Method of sorting a group of integrated circuit devices for...

Data processing: generic control systems or specific application – Specific application – apparatus or process – Product assembly or manufacturing

Reexamination Certificate

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C700S095000, C700S108000, C700S109000, C700S213000, C700S215000, C250S306000, C250S492100, C250S234000

Reexamination Certificate

active

06529793

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates in general to integrated circuit (IC) manufacturing and, more specifically, to methods in IC manufacturing processes for sorting IC devices using identification (ID) codes, such as fuse ID's, in the devices.
2. State of the Art
Integrated circuits (IC's) are small electronic circuits formed on the surface of a wafer of semiconductor material, such as silicon, in an IC manufacturing process referred to as “fabrication.” Once fabricated, IC's are electronically probed to evaluate a variety of their electronic characteristics, cut from the wafer on which they were formed into discrete IC dice or “chips,” and then assembled for customer use using various well-known IC packaging techniques, including lead frame packaging, Chip-On-Board (COB) packaging, and flip-chip packaging.
Before being shipped to customers, packaged IC's are generally tested to ensure they will function properly once shipped. Testing typically involves a variety of known test steps, such as pre-grade, burn-in, and final, which test IC's for defects and functionality and grade IC's for speed.
As shown in
FIG. 1
, a variety of data are collected as IC's proceed through an IC manufacturing process. For example, fabrication deviation data reflecting quality deviations, such as fabrication process errors, are collected during fabrication and summarized in one or more reports commonly referred to as “Quality Deviation Reports” (QDR's). Similarly, data are collected during probe which record the various electronic characteristics of the IC's tested during probe.
When any of the wafers in a wafer lot are deemed to be unreliable because they are low yielding wafers, as indicated by the collected probe data, or because they are misprocessed wafers, as indicated by the QDR's, all the IC's from the wafers in the wafer lot typically undergo special testing, such as enhanced reliability testing, that is more extensive and strict than standard testing. Since a wafer lot typically consists of fifty or more wafers, many IC's that undergo the special testing do not require it because they come from wafers that are not deemed unreliable. Performing special testing on IC's that do not need it is inefficient because such testing is typically more time-consuming and uses more resources than standard testing. Therefore, there is a need in the art for a method of identifying those IC's in a wafer lot that require special testing and sorting the IC's in the wafer lot into those that require special testing and those that do not.
As described in U.S. Pat. Nos. 5,301,143, 5,294,812, and 5,103,166, some methods have been devised to electronically identify individual IC's. Such methods take place “off” the manufacturing line, and involve the use of electrically retrievable identification (ID) codes, such as so-called “fuse ID's,” programmed into individual IC's to identify the IC's. The programming of a fuse ID typically involves selectively blowing an arrangement of fuses and anti-fuses in an IC so that when the fuses or anti-fuses are accessed, they output a selected ID code. Unfortunately, none of these methods addresses the problem of identifying and sorting IC's “on” a manufacturing line.
BRIEF SUMMARY OF THE INVENTION
An inventive method in an integrated circuit (IC) manufacturing process for sorting IC devices of the type having an identification (ID) code, such as a fuse ID, into those devices requiring a first testing process, such as enhanced reliability testing, and those devices requiring a second testing process, such as standard testing, includes storing data in association with the ID code of each of the devices that indicates each of the devices requires the first or the second testing process. The data may include fabrication deviation data, such as a Quality Deviation Report (QDR), probe data, standard test data, or special test data, such as enhanced reliability testing data. Also, the data may, for example, indicate the need for the first or second testing process by indicating that one or more semiconductor wafers or wafer lots have been mis-processed, or have relatively low yields at probe or during testing. Further, the data may be generated by IC devices other than those devices to be sorted, and may be generated at a point in the manufacturing process before or after the point at which sorting will take place.
The ID code of each of the IC devices to be sorted is automatically read. This may be accomplished, for example, by electrically retrieving a unique fuse ID programmed into each of the devices, or by optically reading a unique laser fuse ID programmed into each of the devices. Also, the data stored in association with the automatically read ID code of each of the IC devices is accessed, and the devices are then sorted in accordance with the accessed data into those devices requiring the first testing process and those devices requiring the second testing process.
The present invention thus provides a method that directs those IC's needing enhanced reliability testing to such testing without the need for all IC's from the same wafer lot, including those from reliable wafers, to proceed through special testing.
In additional embodiments, the method described above is included in methods for manufacturing IC devices and Multi-Chip Modules (MCM's) from semiconductor wafers.
In a further embodiment, an inventive sorting method uses special test data generated by a first group of IC devices undergoing special testing to sort a second group of devices of the type having an identification (ID) code, such as a fuse ID, into those devices requiring the special testing and those requiring standard testing. Specifically, the method includes storing data in association with the ID code of some of the IC devices in the second group that indicates the devices require special testing. Special test data generated by the first group of devices is then stored in association with the ID codes of the previously mentioned devices in the second group, and the special test data indicates these devices in the second group that were previously indicated to require special testing instead require only standard testing. The ID codes of these devices in the second group are then automatically read, the data stored in association with the ID codes is accessed, and the second group of devices is sorted in accordance with the accessed data so the appropriate devices in the second group undergo standard testing.


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Abstract from JP 5-74909, in English, comprising a concise explanation of the relevance of JP-74909 as required by 37 CFR § 1.98(a)(3).

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