Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
2001-06-01
2003-07-08
Callahan, Timothy P. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
C327S562000
Reexamination Certificate
active
06590441
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to electronic circuits and systems. More specifically, the present invention relates to electronic circuits and systems for generating accurate currents and voltages in integrated circuits.
2. Description of the Related Art
Accurate voltage, current and other references are needed in modern analog integrated circuit design. Currently, voltage is the only parameter that can be accurately generated on an integrated circuit chip. Other parameters, such as current, resistance, and capacitance, cannot currently be controlled more accurately than ±15-40% unless a special process of trimming is used. For this reason, circuits are typically designed to exploit ratios of currents, capacitors and/or resistances. If an absolute value is required (other than for voltage), it will usually have to be supplied through external pins on the circuit board. Unfortunately, this is not cost effective and increases the complexity of the circuit.
Accurate transconductance is often required in analog circuits. Transconductance (g
m
) is the ratio of the output current to the input voltage. Currently, a constant g
m
bias circuit can be used to generate an accurate transconductance (with an accuracy of ±1% or better), through the use of a single external resistor. The circuit uses an added pin and makes the application board more complicated. However, this is typically perceived to be a small price to pay for accurate control of g
m
. After the transconductance of one transistor is defined, it is possible to control the transconductance of all transistors by the use of transistor and current ratios, which can be accurately controlled in VLSI. Consequently, most analog circuits include a constant g
m
bias circuit.
Some analog circuits also require an accurate current source, in addition to accurate transconductance, for such applications such as sensing, measurement, power control, and high frequency-low voltage. Currently, there is no way to generate an accurate current source without adding additional external devices, which add cost and complexity.
Furthermore, some circuits also require other accurate parameters, such as resistance or capacitance. Currently, there is no known way to accurately generate any parameters, other than voltage, without adding additional external devices, trimming or special processes.
Hence, a need remains in the art for an improved analog integrated circuit design offering multiple accurate reference sources in a cost-effective manner.
SUMMARY OF THE INVENTION
The need in the art is addressed by the present invention, which in a most general description provides a first circuit for generating a first accurate reference signal and a second circuit for generating a second accurate reference signal. The first and second circuits are disposed on a common substrate. A third mechanism is provided for alternately periodically coupling the first or second circuits to an external (off-substrate) device for providing an accurate reference signal.
In a specific embodiment, the invention provides a circuit for accurately tuning the absolute values of multiple parameters, such as current, transconductance, resistance, and/or capacitance, in a VLSI system with minimal changes to existing transconductance bias circuits by reusing an single external resistor.
In an illustrative embodiment, the invention includes a first circuit for generating an accurate transconductance using a single external resistor R
ext
; a second circuit for generating an accurate current reference using the same external resistor R
ext
; and a third circuit for alternately switching on and off the first and second circuits in order to share the external resistor R
ext
.
In the illustrative embodiment, the first circuit includes four transistors M
1
G
, M
2
, M
3
G
, and M
4
G
and an external resistor R
ext
connected as a constant transconductance bias circuit. The gate of M
3
G
is connected to the gate of M
4
G
by a switch S
G
4
, the gate of M
1
G
is connected to the gate of M
2
by a switch S
G
2
, and the source of M
3
G
is connected to the source of M
4
G
by two switches S
G
1
and S
G
3
. These switches are turned on when tuning the transconductance, and turned off otherwise. The gate of M
4
G
is connected to a capacitor C
2
, which is used to hold the bias voltage of the transconductance circuit while the circuit is allocated to another task.
The second circuit includes four transistors M
1
I
, M
2
, M
3
I
, and M
4
I
and the external resistor R
ext
connected as a constant transconductance bias circuit, with one modification: the source of M
1
I
is connected to a voltage source V
ref
. This voltage source can be supplied accurately on chip by a bandgap voltage reference. This circuit generates a current given by I=V
ref
/R
ext
. Since both quantities V
ref
and R
ext
are defined accurately, the current will also be known accurately. Switches are connected in a similar fashion as in the first circuit. These switches are turned on when tuning the current, and turned off otherwise. The gate of M
4
I
is connected to a capacitor C
1
which is used to hold the bias voltage of the current circuit while the circuit is allocated to another task.
In a specific embodiment, the third circuit includes several switches controlled by a digital counter for turning off portions of the circuit which are not in use. In the illustrative embodiment, the invention further includes a fourth circuit for generating an additional accurate reference parameter. The fourth circuit can generate an accurate internal resistance R
int
, an accurate r
DS
, and/or an accurate internal capacitance C
int
.
REFERENCES:
patent: 4731664 (1988-03-01), Nishiwaki et al.
patent: 5568637 (1996-10-01), Moriya
patent: 5621407 (1997-04-01), Jeong et al.
patent: 6294949 (2001-09-01), Kojima et al.
patent: 6300822 (2001-10-01), Cardanha et al.
patent: 6407619 (2002-06-01), Tanaka
Brown Charles D.
Callahan Timothy P.
Cox Cassandra
Pauley Nicholas J.
Qualcomm Incorporated
LandOfFree
System and method for tuning a VLSI circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System and method for tuning a VLSI circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for tuning a VLSI circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3067074