Chemical-mechanical-polishing station

Details Chemical-mechanical-polishing station Chemical-mechanical-polishing station

2001-08-31

2003-07-01

Powell, William A. (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

C156S345120, C216S038000, C216S088000, C438S745000

Reexamination Certificate

active

06586336

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
Semiconductor manufacturing is a highly competitive industry. Success requires the ability to produce high quality, high reliability semiconductor devices at low cost. That requires an ability to rapidly fabricate complex devices at high speed and with high yields.
2. Discussion of the Related Art
Semiconductor manufacturing is a highly competitive industry. Success requires the ability to produce high quality, high reliability semiconductor devices at low cost. That requires an ability to rapidly fabricate complex devices at high speed and with high yields.
The fabrication of a semiconductor device begins with a semiconductor wafer. Such wafers are made by carefully growing a large semiconductor crystal, and then slicing that crystal into individual wafers. For storage and protection the sliced wafers are usually loaded into wafer cassettes. A wafer cassette individually stacks sliced semiconductor wafers in slots. Wafer cassettes are beneficial in that the large numbers of semiconductor wafers can be stored and transported in a protected environment.
Unfortunately, immediately after slicing a semiconductor wafer is unsuitable for fabricating semiconductor devices because the cutting leaves rough surfaces. Surface roughness is a problem because modern fabrication processes require accurate focusing of photolithographic circuit patterns of the semiconductor wafer. As the density of integrated circuits increases, focus tolerances better than 0.1 □meters can be required. Focusing with such small tolerances is not practical if the surface of a semiconductor wafer not highly planar.
A number of techniques for reducing surface roughness exist. In practice, a semiconductor wafer can be mechanically worked by an abrasive pad to produce a fairly smooth surface. However, as indicated above, the surface of a semiconductor wafer needs to be rendered exceptionally smooth.
One technique that can finish the surface of a semiconductor wafer to the required smoothness is Chemical-Mechanical Polishing (“CMP”). In CMP, a semiconductor wafer is mechanically and chemically worked under carefully controlled conditions. Such work is performed using a special abrasive substance that is rubbed over the surface of the semiconductor wafer. The special abrasive substance is typically slurry containing minute particles that abrade, and chemicals that etch, dissolve, and/or oxidize the surface of the wafer.
The mechanical work is performed by polishing pads. By inducing relative motion between a polishing pad and a semiconductor wafer, and by using the abrasive substance, the surface of the semiconductor wafer is planarized.
In addition to mechanically and chemically working a semiconductor wafer, a complete CMP process requires careful cleaning and drying of the semiconductor wafer, and testing to ensure the smoothness and electrical characteristics of the semiconductor wafer. Cleaning and drying is beneficially performed without contaminating the semiconductor wafer. Testing is typically performed using a metrology station. Thus, a functional CMP process requires removing semiconductor wafers from a wafer cassette, CMP polishing, cleaning, drying, testing, and then storing completed semiconductor wafers in a wafer cassette.
Obviously, each of the foregoing process functions involve moving semiconductor wafers from one processing station to the next. To reduced cost, and to avoid damage and contamination, such movement is beneficially performed robotically.
Therefore, a complete CMP process includes a Chemical-Mechanical Polishing system, a cleaning system (which beneficially includes a metrology station), and motion inducing devices that move semiconductors wafers from a starting station, through the CMP process, and to an ending station.
There are many well-known stations that can be used to implement a CMP process. For example,
FIG. 1
schematically illustrates a conventional Chemical-Mechanical Polishing system in the form of a mini-polisher
10
. That polisher includes a large pad
14
on the end of a rotated shaft
16
. A semiconductor wafer
20
is located on the large pad
14
. A small amount of a special abrasive substance
23
is placed over the surface of the semiconductor wafer
20
. Then, a small pad
30
on the end
32
of a rotating small shaft
36
is brought into contact with the surface of the semiconductor wafer
20
. Rotation-induced mechanical abrasion, combined with chemical action, polish the semiconductor wafer. Such CMP systems are well known, reference U.S. Pat. Nos. 5,542,874; 5,944,582; and 6,106,369, all of which are hereby incorporated by reference.
While mini-polishers can produce high quality planar surfaces on semiconductor wafers, a mini-polisher requires a relatively long polishing time when compared to polishers that use large pads. However, U.S. Pat. Nos. 6,169,693 and 6,062,594 disclose polishing systems that use multiple polishing stations.
In particular, U.S. Pat. No. 6,062,594 discloses a system having three mini-polishers. A semiconductor wafer is polished at a first station, then by the second, and finally by the third. Such serial polishing can dramatically increase throughput. However, serially moving a semiconductor wafer from one station to the next might not be optimal. Furthermore, the internal mechanisms of transferring the semiconductor wafers also might not be optimal.
In any event, a typical cleaning system for polished semiconductor wafers includes three cleaning stations. In the first and second cleaning stations, the slurry particles are removed by mechanical contact with brushes. In the first cleaning station NH
4
0H containing de-ionized water can be used to remove particles. In the second cleaning station, a dilute HF solution can be used to lightly etch the semiconductor wafer's surface while removing contaminates and slurry. In the third cleaning station, the semiconductor wafer is rinsed with de-ionized water and dried. While three cleaning stations are typical, the actual number and composition of cleaning stations can vary. But, 2, 3, or 4 stations are the most common.
As semiconductor manufacturing is highly competitive, it is desirable to maximize the rate of polishing semiconductor wafers, while simultaneously minimizing the number of defects. To reduce cost, an automated CMP process is beneficially. Furthermore, as CMP processes tend to be expensive, it is highly desirable to efficiently utilize the systems that comprise the CMP process. Thus, it is desirable to maximize the number of finished semiconductor wafers per hour.
Furthermore, as CMP is typically performed in a clean room, and as clean rooms are expensive, and as that expense tends to increase with the size of the clean room, it is very desirable to minimize the size of the clean room. Minimizing the clean room size requires efficient space utilization. Thus, a CMP system ideally should have a small footprint. In order to achieve a small footprint, the CMP polisher system, the cleaner system, and the input/output and motion inducing systems should be considered together.
In view of the foregoing, it is obvious that a new, integrated CMP system that implements the CMP process would be beneficial. Even more beneficial would be a new, integrated and automated CMP system. More beneficial yet would be a new, automated integrated CMP system having a reduced footprint. Still more beneficial would be a new, automated integrated CMP system that enables a small footprint and that has a high throughput.
SUMMARY OF THE INVENTION
Accordingly, the principles of the present invention provide for a new, integrated CMP process. Those principles further provide for a new, automated integrated CMP process that can be implemented with a small footprint and with a high throughput.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a semiconductor wafer processing system according to the principles of the present invention includes a wafer load statio

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