Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2002-03-22
2003-05-27
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
With measuring or testing
C438S036000
Reexamination Certificate
active
06569695
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATION
This application claims the priority benefit of Taiwan application serial no. 91103245, filed Feb. 25, 2002.
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a method for monitoring a semiconductor process. More particularly, the present invention relates to a method for monitoring particles and defects on a wafer surface and in a process.
2. Description of Related Art
In a semiconductor process, monitoring steps are usually conducted to monitor particles and defects on a wafer after some critical fabricating steps. Since the particles and the defects generated in the critical fabricating steps will significantly deteriorate the quality of the device, the monitoring steps are quite important for a semiconductor process.
In the prior art, a monitoring step is conducted directly after a critical fabricating step, wherein the particles and the defects on a wafer are detected with a monitoring instrument.
However, when the size of a particle or a defect on a wafer surface is smaller than the detecting limit (~0.1 &mgr;m) of current monitoring instruments, the particle or the defect cannot be detected. This problem is troublesome especially for the fabrication of smaller devices in a highly integrated product since tiny defects or particles will deteriorate the quality of the device significantly.
SUMMARY OF THE INVENTION
In view of the above-mentioned problem, this invention provides a method for monitoring particles and defects on a wafer surface and in a process to improve the detecting sensitivity of defects or particles.
In the method for monitoring particles and defects on a wafer surface of this invention, a monitoring instrument is used to monitor the particles/defects possibly present on a substantially effective surface of the wafer, wherein the particles/defects include those with sizes smaller than 0.1 &mgr;m. Before the monitoring step, a substantially uniform conformal layer is formed on the wafer, wherein the thickness of the conformal layer is controlled so that the apparent sizes of the particles/defects possibly present on the surface can be increased moderately. The conformal layer may comprise silicon nitride, polysilicon or silicon oxide, and may be formed in a thermal process common centura using rapid thermal process (RTP) deposition for only 6~10 minutes to have a thickness from 1000 Å to 2000 Å, for example.
This invention further provides a method for monitoring particles and defects possibly generated in a process to estimate the amount of the particles/defects possibly generated in a fabricating machine during a real production. In this method, a dummy wafer is placed into the fabricating machine to be processed under the same conditions as in the real production. A substantially uniform conformal layer is formed on the dummy wafer, wherein the thickness of the conformal layer is controlled so that the apparent sizes of the particles/defects possibly present on the surface can be increased moderately. The conformal layer may comprise silicon nitride, polysilicon or silicon oxide, and may be formed in a thermal process common centura using rapid thermal process (RTP) deposition for only 6~10 minutes to have a thickness from 1000 Å to 2000 Å, for example. Subsequently, a monitoring instrument is used to detect the surface of the conformal layer to monitor the particles/defects possibly present on the surface.
Since the apparent sizes of the particles or the defects on a (dummy) wafer surface are increased with the conformal layer formed thereon, a particle or a defect having originally a size smaller than the detecting limit of the monitoring instrument can be detected. Therefore, by using the method of this invention, the detecting sensitivity problem encountered in the prior art can be solved.
Moreover, since the conformal layer is formed on the (dummy) wafer surface in a thermal process common centura using rapid thermal process (RTP) deposition in this invention, it takes only 6~10 minutes to form a thickness from 1000 Å to 2000 Å. Therefore, the method of this invention just takes a little more time than before.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5936726 (1999-08-01), Takeda et al.
patent: 6103563 (2000-08-01), Lukanc et al.
Chen Shih-Yen
Tseng Chao-Chuan
Dang Phuc T.
J. C. Patents
Macronix International Co. Ltd.
Nelms David
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