Fabrication process for a semiconductor component

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

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Reexamination Certificate

active

06624042

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a semiconductor component having a substrate and a trench which is provided in the substrate. The invention also relates to a corresponding fabrication process.
BACKGROUND
The term substrate is to be understood in a general sense and may therefore cover both single-layer and multilayer substrates.
Although it can be applied to any desired semiconductor components, the present invention and the problems on which it is based are explained in the context of a trench capacitor having an insulation collar.
FIGS. 4-5
diagrammatically depict the essential process steps involved in the fabrication of a known semiconductor component.
In
FIG. 4
,
1
denotes a semiconductor substrate made from silicon, on the surface of which a nitride layer
5
with a thickness d
N
is provided, this layer serving as a hard mask layer for the etching of the trench
15
. The hard mask used is a significantly thicker oxide layer, which at this point has already been removed again.
In the known trench capacitor process, it is necessary to provide an oxide layer
10
on the vertical trench walls. For this purpose, it is customary to carry out a relatively conformal deposition, for example with ozone TEOS oxide, or ozone TEOS for short (i.e. oxide which is produced using ozone and TEOS), leading to the structure shown in FIG.
4
.
As can be seen from
FIG. 4
, the deposition is conformal but surface-selective. This means that the ozone TEOS grows at different rates on different surfaces, the result being slower layer growth, to form a thickness d
0
2
, on silicon nitride than on silicon dioxide, which in turn produces growth which is slower than that which is found on the silicon substrate (layer thickness d
0
1
).
In this case, as in other cases, however, a greater layer thickness is desired on the substrate surface, in this case on the nitride layer
5
, than on the trench base. However, since the nitride is situated on the substrate surface and silicon or silicon dioxide is situated on the trench base, this is not possible.
This is to be seen in connection with the following process steps, which are shown in FIG.
5
. As shown in
FIG. 5
, in fact, the ozone TEOS layer
10
is removed from the trench base using an anisotropic etching step. However, in this case this step is impossible without attacking the surface of the nitride layer
5
, which leads to a reduced thickness D
N′
of the nitride layer
5
.
Therefore, this prior art does not allow thick deposition of ozone TEOS
10
on the raised horizontal surfaces, so that corresponding oxide residues can be reliably removed from the trench base by anisotropic etching without the structures on the substrate topside being attacked.
Therefore, it has hitherto been necessary to accept a high nitride loss during etching. The etching also took place partially selectively, with either a polymer or an oxide being deposited on the nitride layer
5
. Consequently, although it is possible to overetch for longer without reducing the thickness of the nitride layer
5
, the topside of the side wall also undergoes undercut etching during the overetching, and furthermore the polymer or oxide has to be removed again in a further step.
Furnace deposition of the silicon dioxide, which is not surface-selective, is also possible. However, the layer thickness on the structure cannot be set independently of that on the side wall. Moreover, furnace deposition processes stretch the available temperature balance. Furthermore, furnace deposition processes which are set in such a manner that they deposit more on the surface than in the trenches produce oxide layer thicknesses which on the side walls drop from the top downward.
SUMMARY
The object on which the present invention is based is that of providing optimum layer thickness conditions for the etching.
According to the present invention, it is possible to create a thin insulating layer, e.g. SiO
2
, on the base, a thicker insulating layer on the side wall and an even thicker insulating layer on the substrate topside. Consequently, the etching, for example by using an end point, can be realized in such a way that at the end of etching the base between the structures is etched without any residues, yet nevertheless the topside of the structures is not attacked. Vertical surfaces have insulating layer thicknesses which remain substantially constant over their entire length and, after the etching, extend all the way to the surface of the structures.
The general idea on which the present invention is based consists in providing a suitable liner layer which enables the thickness growth of the insulating layer to be suitably controlled. The liner is expediently deposited at high pressure, preferably between 15 and 35 torr, which enables the deposition to be highly nonconformal, so that a significantly thicker insulating layer is formed on the substrate surface than on the trench walls and on the trench base; by varying the deposition time of the liner and of the insulating layer, it is possible to set the ratio between the layers on horizontal and vertical surfaces independently of one another and within wide ranges.
According to one preferred refinement, the substrate is a silicon substrate and the insulating material is silicon dioxide.
According to another preferred refinement, the layer of the insulating material has been applied by an ozone TEOS process. The desired thickness ratios can easily be achieved by a plasma oxide liner which is deposited before the ozone TEOS process. The liner deposition may take place in situ in the same process chamber as that in which the ozone TEOS is deposited. This is in any case expedient in the known process, since the chamber is cleaned with plasma after the ozone TEOS deposition (i.e. without wafers).
According to a further preferred refinement, a nitride layer, which is covered by the liner layer at least in regions, is provided on the substrate topside.
According to a further preferred refinement, the liner layer is removed from the trench base at least in regions.


REFERENCES:
patent: 6319788 (2001-11-01), Gruening et al.
patent: 6413835 (2002-07-01), Norstrom et al.
patent: 19827686 (1999-12-01), None

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