Amplifiers – With semiconductor amplifying device – Including plural amplifier channels
Reexamination Certificate
2001-03-19
2003-05-20
Pascal, Robert (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including plural amplifier channels
C330S306000, C330S286000
Reexamination Certificate
active
06566956
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a high frequency power amplifier for a transmitter used for a mobile communication base station, particularly relates to a high frequency power amplifier provided with a circuit for preventing the loop oscillation and the self oscillation of a travelling wave combine type power amplifier.
Currently, tens to hundreds of watt average transmission power is required for the output of a transmission power amplifier used for a mobile communication base station so that one base station supports tens to hundreds of subscribers.
Also, to realize various communication service, a digital communication mode is mainstream. As a modulation mode in the case of a digital communication mode is phase/amplitude modulation, high linearity is required for a transmission power amplifier. To compensate nonlinearity of a semiconductor device for realizing a transmission power amplifier, hundreds of watt to several kilowatt saturation power which is equivalent to approximately ten times of average transmission power is required for the transmission power amplifier. Only a small quantity of power can be generally output by one semiconductor device used for a transmission power amplifier and for example, at the current technological level, saturation power in a band of 2 GHz is approximately 10 to 100 W. Therefore, in case a power amplifier is designed using a semiconductor device, plural semiconductor devices are required to be used and the output is required to be combined to output heavy power.
For a method of combining the power of a power combiner applied to such a power amplifier for a mobile communication base station, a Wilkinson type disclosed at 97′ Electronics Society Meeting (C-2-27) held by The Instituted of Electronics, Information and Communication Engineers for example and a cluster type combine system which is its transformed type are known.
SUMMARY OF THE INVENTION
FIG. 2
shows the circuit configuration described above which is marked with a broken line showing a closed loop corresponding to a loop oscillation at a low frequency studied as a problem by the present inventors. This circuit has the configuration that after a high frequency signal input from a port
1
is divided by a power divider, it is input to the gate of each semiconductor device via a matching circuit on the input side, after it is amplified, it is input to a combine circuit via a matching circuit on the output side, is combined again and is output from a port
2
.
As shown in
FIG. 2
, in this conventional type combine system, a capacitor for cutting off a loop to prevent low frequency loop oscillation and a bias circuit which also functions as an oscillation prevention circuit for applying bias to each device for combining and preventing the self oscillation of each device are provided every semiconductor device.
Also, a line connecting each gate and each drain of two semiconductor devices FET
1
and FET
2
respectively in series is provided without supplying bias every semiconductor device, gate bias Vg is applied to a bias circuit on the input side in the upper left of FIG.
2
and drain bias Vd is applied to a bias circuit on the output side in the upper right.
However, in the configuration according to prior art, loop oscillation at a low frequency caused due to a closed loop is required to be prevented every combined semiconductor devices (or combined power amplifiers) Therefore, a coupled-line directional coupler is required to be used for a power combiner or a capacitor for low frequency rejection for preventing a closed loop from being formed is required to be inserted into each signal line. Therefore, for a countermeasure for the former, multiple &lgr;/4 coupled lines are required to be provided, for a countermeasure for the latter, an individual bias circuit is required for each amplifier because direct current is cut off and both countermeasures have a problem that large area is occupied.
Also, as a semiconductor device causes self oscillation by impedance applied to input and output, a circuit for attenuating oscillation power such as including a resistance component in an oscillation frequency is required to be provided and there is a defect that a power efficiency is deteriorated.
In the case of bias construction in such an example of the conventional type, as bias Vg and Vd are supplied from either (the side of FET
1
in
FIG. 2
) of FETs connected in series, there is also possibility that a phenomenon such as the balance of combination is broken in an amplitude-frequency band and the performance of the whole is deteriorated occurs. Also, in case plural similar amplifiers are further configured in parallel to increase power in addition to the configuration shown in
FIG. 2
, not only plural closed loops shown by a broken line in
FIG. 2
are formed but a larger closed loop via an apart another semiconductor device is formed and a circuit to prevent these loop oscillation and self oscillation is required to be provided.
As described above, to prevent loop oscillation at a low frequency and the self oscillation of the semiconductor device, the two circuits are provided.
The object of the invention is to provide a compact high frequency power amplifier in which a circuit for preventing the loop oscillation of a travelling wave combine type high frequency amplifier and the self oscillation of each amplifier itself is provided.
To achieve the object, the high frequency power amplifier according to the invention is provided with a low frequency oscillation prevention circuit that attenuates each frequency of loop oscillation and self oscillation to a signal line on which a signal is divided by a power divider/combiner. As described above, heretofore, two circuits are required to prevent loop oscillation and self oscillation, however, as this low frequency oscillation prevention circuit can be composed of one circuit, it can be miniaturized.
Referring to
FIGS. 6A and 6B
, the principle of the invention will be described below.
FIG. 6A
shows the frequency characteristic of the passing signal power of the travelling wave combine type high frequency power amplifier in case the invention is not used and
FIG. 6B
shows the frequency characteristic of a passing attenuate value in case low frequency oscillation prevention circuits equivalent to one embodiment described later of the invention and shown in
FIG. 1
, that is, low frequency rejection filters
3
a
1
to
3
an
are composed of capacitors
31
a
1
to
31
an
, inductors
31
b
1
to
31
bn
and resistors
31
c
1
to
31
cn
as shown in FIG.
5
.
In the case of a travelling wave combine type high frequency power amplifier for which the invention is not used, as shown in
FIG. 6A
, for the frequency characteristic of passing signal power, two oscillation of loop oscillation by a closed loop and self oscillation by a semiconductor device itself are caused in a frequency band below an amplitude band. In these oscillation, oscillation signal power is hardly stable and often increases to the limit of a used semiconductor device, that is, until the semiconductor device is broken.
To prevent the two oscillation from being caused, parallel resonance is first caused by the capacitors
31
a
1
to
31
an
and the inductors
31
b
1
to
31
bn
. If a parallel resonance frequency at this time is designed so that it is a loop oscillation frequency lower than the amplitude band of the power amplifier, that is, each semiconductor device for power amplification, impedance becomes infinite in the loop oscillation frequency and the travelling wave combine type high frequency power amplifier has no closed loop. Therefore, no loop oscillation occurs.
Also, for the self oscillation of the semiconductor device, in a state in which no parallel resonance by the capacitors
31
a
1
to
31
an
and the inductors
31
b
1
to
31
bn
is caused, as the resistors
31
c
1
to
31
cn
respectively have a pure resistance value or a resistance value close to the pure resistance value to each semiconductor device, no self
Maeki Akira
Ohnishi Masami
Antonelli Terry Stout & Kraus LLP
Hitachi , Ltd.
Nguyen Khanh Van
Pascal Robert
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