Pulse or digital communications – Receivers – Particular pulse demodulator or detector
Reexamination Certificate
1999-10-05
2003-05-13
Corrielus, Jean (Department: 2631)
Pulse or digital communications
Receivers
Particular pulse demodulator or detector
C375S355000, C375S371000, C370S503000, C370S518000
Reexamination Certificate
active
06563888
ABSTRACT:
This application is based on applications Nos. 10-284624, 10-286496, and 10-344137 filed in Japan, the contents of which are hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a data transmission/reception system, data reception device, and data transmission/reception method for synchronizing data transfer between the transmitter and the receiver.
2. Description of the Related Art
An image forming apparatus such as a digital copier (hereinafter “copier”) performs image forming as follows: having a laser diode (LD) modulate based on image data read from a document to emit a laser beam, forming an electrostatic latent image on the surface of a photosensitive drum, developing the electrostatic latent image into a visible toner image with a developer, and transferring the toner image onto a transfer sheet.
In such an apparatus, data is transmitted/received between an image reading unit that reads the image data from the document and a printing unit that forms the electrostatic latent image by means of the LD modulation using the read image data.
For fast copying operations of the copier, the image data needs to be sent from the image reading unit to the printing unit at high speed. One method used for high-speed data transmission is a bit serial data transmission method.
In this method, the transmitter sends transmission data according to a predetermined clock signal (transmission clock signal), where the transmission data is made up of frames that each include a synchronization signal alternating between “0” and “1” bit-by-bit followed by information data of 8-bit strings representing textual or image information. The receiver receives the synchronization signal, generates a clock signal (reception clock signal) whose frequency and phase are equal to the synchronization signal, and samples the information data that follows using the reception clock signal.
For such data transmission/reception to be accurately performed, it is essential to match (synchronize) phases between the frequency of the transmission clock signal and the frequency of the reception clock signal. One example of synchronous methods is a PLL (Phase-Locked Loop).
FIG. 1
shows the general configuration of a PLL. In the figure, the PLL is roughly composed of a phase comparator
401
, a lowpass filter (LPF)
402
, and a voltage controlled oscillator (VCO)
403
. The PLL has the VCO
403
generate a signal of a frequency in sync with a frequency (reference frequency
411
) of an external input signal, in the following manner.
First, the phase comparator
401
compares an input comparison frequency
411
with the reference frequency
412
and outputs a signal
413
corresponding to a phase difference of the two frequencies to the LPF
402
. The LPF
402
outputs a direct current component
414
obtained through the elimination of high frequency components from the signal
413
to the VCO
403
. The VCO
403
is an oscillator whose output frequency varies with an input voltage, and outputs a signal of a frequency corresponding to a voltage of the direct current component
414
. The signal outputted from the VCO
403
is then returned back to the phase comparator
401
with its frequency as the comparison frequency
412
.
Alternatively, a frequency divider
404
may be inserted between the VCO
403
and the phase comparator
401
. In this case, the comparison frequency
412
will be the result of frequency dividing the signal outputted from the VCO
403
by N (N is an integer no less than 1), so that the two signals will be synchronized where the VCO
403
oscillates at a frequency N times as large as the reference frequency
411
.
As a result of repeating the above process of comparing the phase of the incoming reference frequency
411
with the phase of the comparison frequency
412
outputted from the VCO
403
and changing the input voltage of the VCO
403
based on the phase difference, the signal of the frequency (frequency N times as large as the reference frequency
411
if the frequency divider
404
is inserted) in sync with the reference frequency
411
is generated from the VCO
403
.
Such PLLs are used in copiers to bring the frequency (equivalent of the comparison frequency
412
) of the reception clock signal in the printing unit (receiver) into sync with the frequency (equivalent of the reference frequency
411
) of the transmission clock signal outputted from the image reading unit (transmitter).
Synchronous processing in a copier has two main stages. The first synchronous processing is referred to as “synchronous setting” that is performed prior to copying operations, such as when the copier is powered up. In this stage the transmission clock signal and the reception clock signal are synchronized at a predetermined frequency (hereafter “synchronization frequency”) in preparation for copying operations. The synchronization frequency is generally set according to the standard (voltage-frequency characteristic) of a VCO that generates the reception clock signal.
The second synchronous processing is referred to as “synchronous adjustment” that is performed each time a copying operation is executed or each time copying operations for a predetermined volume are completed. The synchronous adjustment is to recover the reception clock frequency, that gradually deviates from the synchronization frequency due to leakage currents occurring in the PLL during standby or data transmission/reception, to be synchronous to the synchronization frequency.
Given increasing demands for faster image forming of copiers, transfer rates of image data directly affect the performance of the machine, so that it is desirable to minimize the time taken for the synchronous adjustment that is the preprocessing of the image data transfer. The synchronous adjustment time depends on the synchronization frequency which has been set during the synchronous setting.
FIG. 2
shows the voltage-frequency characteristic of the VCO. Although the VCO changes its output frequency relative to an input voltage, the PLL can perform synchronization only within a synchronous range shown by solid line
501
. Besides, there is a property that synchronous processing takes more time when the synchronization frequency is around the upper limit Fa or lower limit Fb (point H or L) of the synchronous range, than when the synchronization frequency is around median frequency Fm (point M) of the synchronous range. This is because leakage currents increase as the synchronization frequency approximates to the upper or lower limit of the synchronous range, thereby causing a greater frequency deviation. It is therefore preferable to set the synchronization frequency at around point M (frequency Fm, input voltage Vm) in the synchronous range.
Accordingly, in the synchronous setting the image reading unit (transmitter) outputs a signal of frequency Fm at point M to the printing unit (receiver) as the transmission clock signal, and the printing unit activates the PLL with frequency Fm as the reference frequency (synchronization frequency) to synchronize the reception clock signal to the transmission clock signal.
Nevertheless, the frequency band of the VCO synchronous range varies with changes in solid state and use environment of the copier, so that the transmitter outputting a signal at a predetermined frequency (Fm in
FIG. 2
) does not necessarily mean the receiver synchronizing with the transmitter at the center (around point M) of the synchronous range. There may be cases where the synchronization frequency is set at a frequency band (e.g. around point H or L) which is undesirable for the synchronous adjustment.
Especially, the synchronous range becomes smaller if a VCO with a crystal of a narrower frequency variable range is used in order to stabilize transfer rates. To perform synchronization at the center of the synchronous range in such a case is even more difficult.
FIG. 3
shows a change of the synchronous range in the receiver's VCO caused by the variation of use environment of the
Corrielus Jean
Minolta Co. , Ltd.
Sidley Austin Brown & Wood LLP
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