Silicon wafer for epitaxial wafer, epitaxial wafer, and...

Single-crystal – oriented-crystal – and epitaxy growth processes; – Forming from vapor or gaseous state

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C117S013000, C117S019000, C117S020000, C117S084000

Reexamination Certificate

active

06626994

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
None
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
Not Applicable.
INCORPORATION-BY-REFERENCE-OF MATERIALS SUBMITTED ON A COMPACT DISC
Not Applicable
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention relates to a substrate for an epitaxial wafer wherein few crystal defects exist in an epitaxial layer compared with the conventional epitaxial wafers, an epitaxial wafer, and a method for producing it.
(2) Description of Related Art Including Information Disclosed under 37 C.F.R. 1.97 and 1.98.
Reduction of crystal defects in a semiconductor, especially the crystal defects on or near the surface, is getting more important with a recent tendency to increase the degree of integration of a semiconductor device. For this reason, the demand for an epitaxial wafer which has an epitaxial layer (hereinafter referred to as “epi-layer”) excellent in crystallinity is increasing year by year.
Meanwhile, various crystal defects exist also in an epitaxial wafer, which have a harmful effect on a device, resulting in reduction in the yield. Therefore, it is necessary to reduce them.
There is a report that crystal defects in a polycrystalline epitaxial layer are generated from particles, which had adhered to the surface of the silicon wafer for epitaxial growth (hereinafter referred to as “substrate” occasionally) on which an epitaxial layer is formed (For example, Iwabuchi et al., Extended Abstracts (The 45th Spring Meeting, 1998); The Japan Society of Applied Physics and Related Societies,
28
a
-PB-
1
). Namely, it is necessary to perform epitaxial growth (hereinafter referred to as “epi-growth” occasionally), after removing the particles on a substrate, in order to prevent a part of the epitaxial layer from getting polycrystal.
A void type defect (hereinafter referred to as “voids” occasionally) exposed on the substrate surface is a vacancy cluster in the grown-in defect mainly introduced when growing a silicon single crystal that is exposed to the wafer surface. It has been considered that the voids may be a shallow pit after epi-growth, but they do not become crystal defects (Kimura et al., Journal of the Japanese Association for Crystal Growth 24 (1997) 444). The cause of generation of the defects in the epitaxial layer called an epitaxial stacking fault (hereinafter referred to as “SF”) is not clear by present, and a method for reducing them has not been found.
BRIEF SUMMARY OF THE INVENTION
The present invention has been accomplished to solve the above-mentioned problems. An object of the present invention is to provide a silicon wafer for epitaxial growth, an epitaxial wafer, and a method for producing it wherein generation of SF is reduced.
In order to solve the above-mentioned problems, the present invention relates to a silicon wafer for epitaxial growth wherein a void type defect is not exposed at least on a surface where an epitaxial layer is grown.
As described above, if a void type defect is not exposed at least on a surface where an epitaxial layer is grown, generation of SF during epitaxial growth can be prevented in the silicon wafer for epitaxial growth. Since it is clear that SF is generated from the void type defect, SF can be prevented from generating in an epi-layer by using a wafer that does not contain such a void type defect as a substrate for an epitaxial wafer.
In addition, in a usual epitaxial process, hydrogen baking is performed just before growing an epitaxial layer, and the substrate surface is etched to some extent. Therefore, “the surface where an epitaxial layer is grown” in the present invention substantially means the surface of the substrate just before an epitaxial layer is grown after the hydrogen baking (the boundary surface between an epitaxial layer and a substrate).
In this case, it is desirable that the above-mentioned void type defect does not exist in the part to the depth of at least 10 nm from the surface on which an epitaxial layer is grown.
Even if the void type defect is not exposed on the surface just before an epi-layer is grown, SF may be generated in the case that the void type defects exist in the part to the depth of 10 nm from the surface.
Moreover, it is desirable that nitrogen is doped in the above-mentioned silicon wafer for epitaxial growth.
Because, if the substrate in which nitrogen is doped is used, the nuclei of oxygen precipitation in the bulk part of a substrate will not disappear for the effect of nitrogen, even in the case that high temperature epitaxial growth is performed, and therefore gettering sites are formed in a subsequent device process, so that highly efficient epitaxial wafer can be obtained.
If the epitaxial layer is formed on the surface of the silicon wafer for epitaxial growth of the above-mentioned present invention, an epitaxial wafer of high quality wherein there is no SF or very few SF compared with the conventional one in the epitaxial layer can be obtained.
Moreover, the present invention relates to a method for producing an epitaxial wafer comprising measuring the number of the void type defects exposed on the surface of a silicon wafer and/or the number of the void type defects which exist in the part to the depth of at least 10 nm from the surface of the silicon wafer, choosing the silicon wafer wherein the number of these void type defects is smaller than the predetermined value, and growing an epitaxial layer on the surface of the chosen silicon wafer.
For example, the present invention relates to a method for producing an epitaxial wafer comprising taking one or more wafers from wafers in one manufacture lot, measuring the number of void type defects exposed to the surface of the wafer and/or the number of void type defects existing in the part to the depth of at least 10 nm from the surface of the wafer, choosing the silicon wafer wherein the void type defects are less than the predetermined values, namely the wafer with which are satisfied the number of the void type defects predetermined so as to be permitted from the specification (maximum value of the number of SF) of an epitaxial wafer required by a user, and growing an epitaxial layer thereon.
Thereby, a failure rate of the wafer can be reduced in manufacture of an epitaxial wafer, and feed back to the condition for production of a silicon single crystal wafer suitable for the epitaxial wafers according to user specification is made possible.
Moreover, the present invention relates to a method for producing an epitaxial wafer wherein a silicon wafer having void type defects exposed to the surface and/or void type defects in the part to the depth of at least 10 nm from the surface is subjected to heat treatment so that the above-mentioned void type defects may be eliminated and/or made into a form that does not become a generation source of SF, and an epitaxial layer is grown on the above-mentioned silicon wafer surface.
As described above, even in the wafer wherein the void type defects exist on or near the surface and SF will be generated when epitaxial growth is performed, if the voids on or near the surface are eliminated or made change to the form which does not generate SF by heat-treatment before epitaxial growth and an epitaxial layer is grown, an epitaxial wafer having high quality can be obtained. Thereby, the epitaxial wafer which does not generate SF during epitaxial growth can be obtained irrespective of the condition for production of a silicon single crystal wafer.
In this case, it is preferable that heat treatment is conducted at a temperature of 1100-1300° C. in non-oxidizing atmosphere as the above-mentioned heat treatment, and then, heat treatment at a temperature of 700-1300° C. in oxidizing atmosphere is continuously conducted, without cooling to a temperature less than 700° C.
If heat treatment is conducted in such a heat treatment condition, out-diffusion of the natural oxide film on the surface of a wafer and the oxide film of an inner wall of voids near the surface can be achieved by the first heat treatment in a non-oxidizing atmosph

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Silicon wafer for epitaxial wafer, epitaxial wafer, and... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Silicon wafer for epitaxial wafer, epitaxial wafer, and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Silicon wafer for epitaxial wafer, epitaxial wafer, and... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3040603

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.