Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – Insulating coating
Reexamination Certificate
2001-01-30
2003-01-07
Chaudhuri, Olik (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
With means to control surface effects
Insulating coating
C257S637000, C257S644000
Reexamination Certificate
active
06504234
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a fabricating method thereof, and more particularly, to a structure of an interlayer film in a high-density semiconductor device and a fabricating method thereof.
2. Description of the Related Art
In recent years, as devices become smaller, there is apprehension that resistance is increased by reduced wiring sectional area and electromigration resistance is deteriorated due to increase in current density. For this reason, various new materials have been tried as wiring materials, and one example of the materials is Cu wire. However, since the Cu is difficult to be finely etched, a method for forming the wire using damascene process is used to form the Cu wire. A structure of the conventional semiconductor device using this Cu wire is shown in FIG.
9
. An interlayer film
400
comprising silicon oxide film
407
and BPSG film
409
is formed on a semiconductor substrate
401
in which an MOS transistor is formed. The interlayer film
400
is provided with a contact hole
410
which reaches a diffusion layer
406
. A W plug
412
is embedded in the contact hole
410
. A Cu wire
414
is formed on the silicon oxide film
413
provided on the interlayer film
400
, and a Cu plug
419
and a Cu wire
420
are formed on a silicon oxide film
416
provided on the Cu wire
414
.
The Cu wire
414
is formed in such a manner that a wire groove
415
is formed in the silicon oxide film
413
, Cu film is formed in the wire groove
415
and on the silicon oxide film
413
, the Cu film on the silicon oxide film is removed by CMP (Chemical Mechanical Polishing), and the Cu film only in the groove
415
is left. The Cu plug
419
and the Cu wire
420
are formed by a so-called dual damascene process in which a via hole
417
and a wire groove
418
are formed in the silicon oxide film
416
, Cu is embedded in the via hole
417
and the wire groove
418
, and unnecessary Cu is removed by the CMP.
It is possible to form a Cu wire having low resistance and high electromigration resistance by using the damascene process.
According to the method for forming the wire using the damascene process, however, a step for removing the unnecessary portion of the wire material by the CMP to flatten is required, and with this step, it is found that the following problems are caused.
That is, in the CMP of a metal film such as Cu and W, a solution comprising slurry including ferric nitrate or the like for oxidizing metal is used in some cases. Heavy metals such as Fe, alkaline metals or Cu and the wire materials have large diffusion coefficient in silicon oxide films or semiconductor substrates. Therefore, during the CMP for forming the Cu wire, or during the subsequent cleaning step, Fe or Cu remained on the interlayer insulating film is diffused in the silicon oxide film or the BPSG film during the subsequent thermal process, and the Fe or Cu reaches the semiconductor substrate. As a result, there are problems that reduction of lifetime is caused, and reliability of the device is lowered. Further, since the CMP is used also when the W plug
412
is formed, the same problems are caused.
A semiconductor having a diffusion-barrier film, for example, is disclosed in Japanese Unexamined Patent Publication (KOKAI) No. 8-306694. However, this film does not solve the above mentioned problems.
SUMMARY OF THE INVENTION
Thereupon, it is an object of the present invention to solve the above problems and to provide a semiconductor device having high reliability.
To achieve the above object, the present invention provides a semiconductor device comprising an interlayer film formed on a semiconductor substrate, wherein the interlayer film includes a diffusion-preventing film for preventing metal impurities invading from an upper portion of the interlayer film from reaching the semiconductor substrate.
The invention also provides a fabricating method of a semiconductor device comprising the steps of: forming, on a semiconductor substrate, a diffusion-preventing film for preventing metal impurities invading from an upper portion of the semiconductor substrate from reaching the semiconductor substrate, forming an insulating film on the diffusion-preventing film, forming a wire groove in the insulating film, forming a metal film in the wire groove and on the insulating film, and removing the metal film deposited on said insulating film by a CMP such that the metal film is remained in the wire groove to form a metal wire.
The diffusion-preventing film may be a polysilicon film, an SIPOS film or such a film doped with boron (B) or phosphorus (P).
Since at least a portion of the interlayer film is provided with the diffusion-preventing film, even if the metal impurities such as copper (Cu) used as the metal wire or Fe included slurry during the CMP invades from the upper portion of the film, the metal impurities are gettered by the diffusion-preventing film, the metal impurities do not reach the semiconductor substrate. Therefore, it is possible to prevent the characteristics of the device formed on the semiconductor substrate from being deteriorated.
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