Method for adjusting the center frequency of a phase locked...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

Reexamination Certificate

active

06529055

ABSTRACT:

BACKGROUND OF THE INVENTION
This application is related to U.S. Patent Application Ser. No. 10/024,416 entitled, “Method for Measuring the Response of a Voltage Controlled Oscillator”(Common Assignee) filed concurrently herewith.
This invention relates to adjusting the frequency of a voltage-controlled oscillator in order to match the timing of pixels to the actual time of flight on a raster output scanner. The described here eliminates a customary inductor, allowing the elimination of a costly manufacturing adjustment.
Referring to
FIG. 1
, there is shown a tangential (fast-scan) view of a prior art raster output scanner
10
of a printing system. The raster scanning system
10
utilizes a laser light source
12
, a collimator
14
, pre-polygon optics
16
, a multi-faceted rotating polygon mirror
18
as the scanning element, post polygon optics
20
and a photosensitive medium
22
.
The laser light source
12
sends a light beam
24
to the rotating polygon mirror
18
through the collimator
14
and the pre-polygon optics
16
. The collimator
14
collimates the light beam
24
and the pre-polygon optics
16
focuses the light beam
24
in the sagittal or cross-scan plane onto the rotating polygon mirror
18
. The facets
26
of the rotating polygon mirror
18
reflect the light beam
24
and cause the reflected light beam
24
to revolve about an axis near the reflection point of the facet
26
. The reflected light beam
24
is utilized through the post polygon optics
20
to scan a document at the input of an imaging system or can be used to impinge upon a photographic film or a photosensitive medium
22
, such as a xerographic drum at the output of an imaging system. Hereinafter, for the purpose of simplicity the “rotating polygon mirror” will be referred to as “polygon”.
In this process, depending on the manufacturing tolerances, each facet might have different characteristics such as a minute width variation which can cause the line scanned by this facet to be scanned faster or slower than average scan time. This type of error is called facet to facet error. In order to correct this problem, it is best to check the error of each facet compared to the average speed of the polygon (average scan time) which is the average speed of all the facets of the polygon.
To find the facet to facet or the reference frequency errors, the time difference between the arrival times of the end of scan and end of count signals of each facet has to be measured. Typically, an analog phase detector is used to measure this time difference. However, analog circuits and analog outputs are not practical in the digital world. Currently, in order to calibrate the voltage-controlled oscillator for reducing frequency errors is to measure the varactor and all other components in the voltage-controlled oscillator, compare these measurements to the circuit performance and calculate an expected range of within which the circuit is expected to perform.
Therefore it would be desirable to design a phase locked loop circuit that performs adjustment of the frequency of the voltage controlled oscillator by measuring and correcting itself in the field during operation. The present invention solves this problem in a unique and novel manner.
SUMMARY OF THE INVENTION
According to the present invention, a method for centering a phase detector within a phase locked loop circuit is provided. First a digital to analog converter is set to its center and a comparator is checked. If the comparator output voltage shows that an integrator output is higher than a reference voltage, then the output of the digital to analog converter is increased by one fourth its maximum. Similarly, if the inverse is true, the output is halved. The steps are repeated until the required precision is reached. The output of the integrator is then set to the reference voltage.


REFERENCES:
patent: 5377233 (1994-12-01), Girmay et al.
patent: 5982208 (1999-11-01), Kokubo et al.
patent: 6075387 (2000-06-01), Urbansky
patent: 6151152 (2000-11-01), Neary
patent: 6178031 (2001-01-01), Rauch et al.
patent: 6288574 (2001-09-01), Neary
patent: 6317161 (2001-11-01), Renner et al.
patent: 6441600 (2002-08-01), Atallah et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for adjusting the center frequency of a phase locked... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for adjusting the center frequency of a phase locked..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for adjusting the center frequency of a phase locked... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3035753

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.