Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
1999-01-12
2003-01-07
Kunemund, Robert (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S723000, C438S743000, C438S906000, C438S700000, C252S079100
Reexamination Certificate
active
06503842
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the use of interhalogen compounds to clean substrates to remove or prevent the formation of oxides, and in particular, the use of interhalogen compounds to clean contacts in-situ prior to metal deposition on silicon wafers.
BACKGROUND OF THE INVENTION
Reactive ion etching is a process whereby a low pressure gas is subject to a radio frequency electric field in a reaction chamber to form a plasma. A plasma is a gas which contains positive, negative and neutral atoms, and/or molecules including radicals and a “gas” of emitted photons. The ions and radicals in the plasma that form the etchants are accelerated by an electric field against the material to be etched. The ions/radicals interact with the surface of the atoms or molecules within the material to be etched, forming a volatile by-product which is subsequently removed from the reaction chamber.
If a chemically inert gas, such as argon, is ionized and accelerated to impinge on a substrate surface, material can be removed from the surface of the substrate by momentum transfer, a process similar to sand blasting. This process is used in three distinct modes: sputter etching, ion-beam milling and focused ion beam etching. Sputter etching and broad-ion beam milling use high-energy, inert gas ions (typically Ar
+
) to dislodge material from the substrate surface, a highly anisotropic etch process. Anisotropic etching occurs when the etch rate is considerably greater in one direction then in another (also known as unidirectional etching). Isotropic etch refers to etching in all directions at a relatively even rate.
The inherent poor selectivity and slow etch rate of these purely physical processes, however, severely limit their use in the cleaning of sub-micron patterns. It can be difficult to focus plasma to the bottom of high aspect ratio (depth:width) features. The anisotropic nature of dry etching makes it difficult to clean two or more surfaces. For example, it is often desirable to clean the bottom and side walls of a high aspect ratio feature on a substrate. Plasma reactors are difficult to modify to perform both the etching process and metal deposition. Finally, the sputtered material is typically non-volatile and tends to re-deposit onto the substrate and elsewhere in the system.
The ion bombardment in reactive ion etching can also result in a charge build-up on insulated surfaces, resulting in damage to the underlying film and semiconductor surface exposed to ion bombardment. For example. if the beam strikes a conducting grounded surface, sufficient secondary electrons are generated to balance the space charge of the beam and external neutralization is not necessary. If ions impinge on an insulated surface, however, positive charge can build-up on the surface, damaging the underlying insulator and semiconductor surface. When accumulated surface charge causes excessive current to pass through an insulator, the damage to the dielectric can be permanent.
Wet process cleaning to remove native oxides is limited in that the surface tension of the liquid inhibits penetration down into surface features with small lateral dimensions or high aspect ratios. Wet process cleaning is difficult to control. Finally, it is difficult to integrate wet process cleaning in the same equipment with metal deposition.
SUMMARY OF THE INVENTION
The present invention is directed to the use of interhalogen compounds to perform cleaning of a substrate to remove or prevent the formation of oxide layers. The oxide layer may be a native oxide layer or some other oxide. The present invention is particularly useful in cleaning high aspect ratio surface features on substrates. The present invention is also directed to the use of interhalogen compounds to clean contacts in-situ prior to metal deposition of silicon wafers.
One embodiment of the method of the present invention is directed to removing an oxide layer from at least one surface feature on an article. The article is located in a reaction chamber. An interhalogen compound reactive with the oxide layer is introduced into the reaction chamber. The interhalogen compound forms by-product gases upon reaction with the oxide layer. Unreacted interhalogen compound and by-product gases are removed from the reaction chamber.
A photoresistive layer impervious to the interhalogen compound may optionally be deposited on a portion of the article to selectively clean the article. One or more surface of the surface feature may be cleaned using the method of the present invention.
In one embodiment, the temperature in the reaction chamber is elevated during or after introduction of the interhalogen compound. In another embodiment, a metal layer is deposited in-situ on a portion of the article within the reaction chamber. In yet another embodiment, the reaction chamber comprises a chemical vapor deposition reaction chamber.
The interhalogen compound is selected from a group consisting of C
1
F
3
, BrF
3
, C
1
F
5
, IF
5
, IF
7
. C
1
F, BrC
1
, IBr, IC
1
, and BrF. In one embodiment, the interhalogen compound is preferably a complex interhalogen gas. Alternatively, the interhalogen compound may be a liquid or solid at room temperature. Non-fluorine-containing interhalogen may also be used. For compounds that form volatile chlorides, bromides or iodides, a reducing gas, such as for example hydrogen, ammonia, amines, phosphine, silanes; and higher silanes, may optionally be added simultaneously with the interhalogen to form a volatile by-product.
The article may be a silicon wafer or a non-silicon metal or metalloid substrate. The surface feature having one or more lateral dimensions of less than 2 micrometers, or alternatively, less than 0.5 micrometers may be cleaned using the present method. The surface feature may have an aspect ratio of at least 1:1, although it will be understood surface features with aspect ratios greater than 40:1 may be cleaned with the present method.
The present invention is also directed to a method of in-situ removal of an oxide layer from a silicon wafer in a chemical vapor deposition chamber prior to metal deposition. Specifically, the method of in-situ removal of an oxide layer from a silicon wafer in a chemical vapor deposition chamber prior to metal deposition, comprises the steps of: locating the silicon wafer in a reaction chamber; introducing an interhalogen compound reactive with the oxide layer into the reaction chamber, the interhalogen compound forming by-product gases upon reaction with the oxide layer; evacuating unreacted interhalogen compound and by-product gases from the reaction chamber; and depositing a metal layer on a portion of the article within the reaction chamber.
The method of the present invention can also be used to remove an oxide layer from an article that may not have a surface feature as described herein. This method can use either a non-fluorine-containing interhalogen compound reactive with the oxide layer and/or an article having a non-silicon surface.
As used in this application:
“Complex interhalogen” refers to non-diatomic interhalogens, such as tetra-atomic, hexa-atomic and octa-atomic interhalogens;
“Lateral dimension” refers to a dimension measured generally parallel to the surface of the substrate, such as width and diameter of a surface feature; and
“Surface features” refers to a trench, via, hole, depression or other deviations from a planar surface.
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Sandhu Gurtej S.
Westmoreland Donald L.
Ahmed Shamim
Kunemund Robert
Mueting Raasch & Gebhardt, P.A.
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