Method for processing wafers in a semiconductor fabrication...

Single-crystal – oriented-crystal – and epitaxy growth processes; – Processes of growth with a subsequent step acting on the...

Reexamination Certificate

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C117S003000, C117S084000, C117S095000, C117S103000, C117S105000, C427S248100, C427S255290

Reexamination Certificate

active

06592661

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates in general to thermal processing systems, and, more particularly, to a method for processing semiconductor devices using rapid thermal processing systems.
Rapid Thermal Processing (RTP) was started as a research technique over 25 years ago using pulsed laser beams. As the semiconductor industry is moving towards submicron devices, RTP is becoming a core technology step in the development and mass production of ultra-large system integration (ULSI) devices. RTP processors attain a desired processing temperature rapidly, without the need for a lengthy “ramp up” period. This quick ramp up minimizes the thermal budget and the total time of the process thereby allowing more dense designs and fewer failures from internal crystalline dislocations. Thus, RTP processors allow microelectronic devices to be fabricated at high temperatures without causing dopant diffusion or other unwanted side effects. Since RTP processors typically process semiconductor wafers, the term “wafer” will be used herein to designate any device, material or substrate processed in the RTP processor.
In contrast.with a conventional furnace which typically uses resistive heating units, an RTP processor typically uses radiant heat sources, for example, arc lamps or tungsten-halogen lamps. A small processing chamber is typically used, to provide a controlled environment for the wafer to be processed and to efficiently couple the heat energy from the radiant energy source to the wafer. RTP has been utilized in a number of different semiconductor processing steps including nitridation, oxidation, dopant activation, silicide formation, and ion implantation damage removal. RTP processors have also been used in rapid thermal chemical vapor deposition (RTCVD) processes.
Two major design considerations in RTP are temperature control and production time. Efficient coupling of the radiant heat from the lamps to the wafer is necessary so that large increases in wafer temperature can be produced in a short time. Moreover, in producing the rapid increase in wafer temperature, a uniform temperature distribution must be provided across the wafer. Lack of uniformity can produce excessive microelectronic device variation across the wafer or may render the wafer unuseable because of internal crystalline dislocation or even wafer cracking. The temperature across the wafer is also difficult to control, especially during the ramp up stage when the lamps are activated. Further, production time is increased as the RTP processor must ramp up to the desired temperature and ramp down once the process step is complete. This time for ramping up and ramping down, while still much less than with prior art furnaces, increases production time and reduces the throughput of the process.
Accordingly, there is a need for a method of processing semiconductor devices in which the processing temperature may be easily and readily controlled. There is a further need for such a method which may be used in a variety of temperature and pressure environments. Preferably, such a method would decrease production time and increase the throughput of the process. Preferably, such a method would be relatively inexpensive and easy to perform.
SUMMARY OF THE INVENTION
The present invention meets this need by providing a method in which a predetermined amount of power is applied to the radiant heat sources in an RTP chamber prior to inserting the wafer to be processed into the chamber. The predetermined amount of power is set so that the wafer reaches the desired processing temperature quickly without the typical ramp up time. The predetermined amount of power remains constant before, during, and after processing such that there is also no ramp down of power associated with the process. The production time of the process is thus reduced. A reflective plate may be positioned within the chamber so that the radiated properties of the wafer are substantially independent of the emissivity of the wafer thereby minimizing wafer to wafer variation. Emissivity variation may also be minimized by positioning the wafer near a plate within the chamber so as to form an isothermal cavity between the wafer and the plate.
According to a first aspect of the present invention, a method of manufacturing semiconductor wafers in a processing chamber having at least one radiant heat source is provided. A predetermined amount of power is provided to the radiant heat source and a wafer is then positioned within the processing chamber. The predetermined amount of power applied to the radiant heat source is set so that the wafer reaches a predetermined temperature in a predetermined amount of time for carrying out a desired process in the processing chamber.
The radiant heat source may comprise a tungsten-halogen lamp. The pressure within the processing chamber during the desired process is greater than approximately 1×10
−10
torr, and preferably, less than approximately 100 mtorr. The pressure within the processing chamber may be less than approximately 15,200 torr. The predetermined amount of time is less than approximately 10 seconds. Preferably, the predetermined amount of power remains substantially constant during the desired process.
According to another aspect of the present invention, a method of manufacturing semiconductor wafers in a processing chamber having at least one radiant heat source and at least one reflective plate is provided. A predetermined amount of power is applied to the radiant heat source and a first wafer having a first emissivity is positioned within the processing chamber such that the radiated properties of the first wafer are substantially independent of the first emissivity. The predetermined amount of power applied to the radiant heat source is set such that the first wafer reaches a predetermined temperature in a predetermined amount of time for carrying out a desired process in the processing chamber.
The method may comprise the step of positioning a second wafer having a second emissivity different from the first emissivity within said processing chamber such that the radiated properties of the second wafer are substantially independent of the second emissivity. An effective emissivity of the first wafer is approximately the same as an effective emissivity of the second wafer. Preferably, the reflective plate has an emissivity greater than approximately 0.6. A distance between the first wafer and the reflective plate is less than approximately 10 cm, and preferably, less than approximately 1 cm. Preferably, the pressure within the processing chamber is less than approximately 100 mtorr. The predetermined amount of power preferably remains substantially constant during the desired process.
According to yet another aspect of the present invention, a method of manufacturing semiconductor wafers in a processing chamber having at least one radiant heat source and at least one plate is provided. A predetermined amount of power is applied to the radiant heat source and a wafer is then positioned within the processing chamber such that an isothermal cavity is formed between the wafer and the plate. The predetermined amount of power applied to the radiant heat source is set so that the wafer reaches a predetermined temperature in a predetermined amount of time for carrying out a desired process in the processing chamber.
Preferably, a distance between the plate and the wafer is approximately 1-10 mm. Preferably, the plate comprises material selected from the group consisting of graphite, silicon, silicon carbide and carbon. The pressure within the processing chamber is preferably greater than approximately 1 mtorr. Preferably, the predetermined amount of power remains substantially constant during the desired process.
According to a further aspect of the present invention, a method of manufacturing semiconductor wafers in a cluster system having at least a first processing chamber and at least a second processing chamber is provided. Each of the first and second processing chambers include at

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