Solid-state imaging device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Charge transfer device

Reexamination Certificate

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Details

C257S233000, C257S443000

Reexamination Certificate

active

06563149

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to solid-state imaging devices.
2. Description of the Related Art
FIG. 1
is a plan view illustrating an example of a known solid-state imaging device. In a solid-state imaging device
102
shown in
FIG. 1
, a plurality of photoelectric conversion elements
106
are disposed in a matrix with a gap therebetween on a photodetector region
105
of a silicon semiconductor substrate
104
. A vertical charge transfer register
108
having a charge coupled device (CCD) structure is disposed for each column of the photoelectric conversion elements
106
in the vertical direction (indicated by the arrow V in
FIG. 1
of the photoelectric conversion elements
106
. A horizontal charge transfer register
110
also having a CCD structure is disposed at one side of the individual vertical charge transfer registers
108
in the horizontal direction (indicated by the arrow H in
FIG. 1
) of the photoelectric conversion elements
106
. An output portion
112
is formed at one end of the horizontal charge transfer register
110
.
In the above-configured solid-state imaging device
102
, upon receiving light, signal charges are generated by each column of the photoelectric conversion elements
106
, and are supplied to the corresponding vertical charge transfer register
108
via a read area (not shown) which intervenes between the photoelectric conversion elements
106
and each of the vertical charge transfer registers
108
. Then, the vertical charge transfer register
108
sequentially transfers the signal charges to the horizontal charge transfer register
110
. Upon receiving the signal charges from the individual vertical charge transfer registers
108
, the horizontal charge transfer register
110
then transfers the signal charges to the output portion
112
. The output portion
112
converts the signal charges into a voltage signal, amplifies it, and outputs the amplified signal.
In the solid-state imaging device
102
, in order to obtain a higher level of resolution of captured images, the number of pixels should be increased. To achieve this, it is necessary to dispose more photoelectric conversion elements
106
on the semiconductor substrate
104
. However, an increased number of photoelectric conversion elements
106
prolongs the time required for transferring the signal charge, and it becomes difficult to ensure the sufficient frame frequency required for displaying captured images.
In order to overcome the above-described drawback, a solid-state imaging device has been proposed in which the photoelectric conversion elements
106
are divided into two groups, which then transfer signal charges by using two horizontal charge transfer registers.
FIG. 2
is a schematic diagram illustrating such a solid-state imaging device. In a solid-state imaging device
114
shown in
FIG. 2
, a photodetector region
105
on a semiconductor substrate is divided into first and second photodetector areas
116
and
118
, and a plurality of photoelectric conversion elements disposed in a matrix are divided into a group disposed in the first photodetector area
116
and a group disposed on the second photodetector area
118
. The signal charges generated by the photoelectric conversion elements in the first and second photodetector areas
116
and
118
are respectively transferred to first and second horizontal charge transfer registers
120
and
122
by using the corresponding vertical charge transfer registers. The photoelectric conversion elements and the vertical charge transfer registers are not shown in FIG.
2
.
Upon receiving the signal charges from the vertical charge transfer registers, the first and second horizontal charge transfer registers
120
and
122
simultaneously transfer the signal charges in the opposite directions so as to supply them to first and second output portions
124
and
126
, respectively, formed at the corresponding ends of the first and second horizontal charge transfer registers
120
and
122
. Then, signals indicating images captured by the photoelectric conversion elements disposed in the first and second photodetector areas
116
and
118
are simultaneously output from the first and second output portions
124
and
126
, respectively. Accordingly, in the solid-state imaging device
114
, the time required for transferring the signal charge is decreased to one half the time for a solid-state imaging device using only one horizontal charge transfer register.
FIG. 3
is a plan view illustrating details of the first and second output portions
124
and
126
disposed at the corresponding ends of the first and second horizontal charge transfer registers
120
and
122
, respectively, shown in FIG.
2
.
The first and second output portions
124
and
126
respectively include first and second signal charge detectors
128
and
130
, first and second transistors
132
and
134
, and first and second charge sweeping regions
136
and
138
.
Each of the first and second horizontal charge transfer registers
120
and
122
includes a transfer passage
140
, which is, for example, an n-type region formed on the surface of a p-type semiconductor substrate, and transfer electrodes (not shown) disposed on the transfer passage
140
in the charge transfer direction. The transfer passage
140
is formed to be narrower, as shown in
FIG. 3
, as it goes to the end of each of the first and second horizontal charge transfer registers
120
and
122
. Each of the first and second signal charge detectors
128
and
130
is formed as, for example, an n-type region on the surface of the semiconductor substrate, at the vicinity of the front end of the transfer passage
140
.
Each of the first and second transistors
132
and
134
includes a gate
142
, a source
144
, and a drain
146
. The gate
142
is formed of, for example, polysilicon, and is formed such that one end thereof overlaps with the corresponding signal charge detector
128
or
130
. In this example shown in
FIG. 3
, the gate
142
of the first transistor
132
extends upward toward the upper left side, while the gate
142
of the second transistor
134
extends upward toward the upper right side. The source
144
and the drain
146
of each of the first and second transistors
132
and
134
are formed as, for example, n-type regions on the surface of the semiconductor substrate, across the gate
142
.
Each of the first and second charge sweeping regions
136
and
138
includes, as shown in
FIG. 3
, a charge sweeping drain
150
and a charge sweeping control gate
152
. The charge sweeping control gate
152
is disposed adjacent to the gate
142
of each of the first and second transistors
132
and
134
, and the charge sweeping drain
150
is formed as, for example, an n-type region on the surface of the semiconductor, at a position opposite to the gate
142
across the charge sweeping control gate
152
.
As shown in
FIG. 3
, the first signal charge detector
128
, the first transistor
132
, and the first charge sweeping region
136
are symmetrical to the second signal charge detector
130
, the second transistor
134
, and the second charge sweeping region
138
, respectively, with respect to an imaginary line
154
drawn orthogonally to the direction in which the first and second horizontal charge transfer registers
120
and
122
are extended.
With this configuration, signal charges transferred from the first and second horizontal charge transfer registers
120
and
122
are converted into voltage signals having a magnitude according to the amount of charge by the first and second signal charge detectors
128
and
130
, and the first and second transistors
132
and
134
amplify the voltage signals and output them from the drains
146
.
The charge sweeping control gates
152
are controlled to be ON or OFF in synchronization with the charge transfer operation of the first and second horizontal charge transfer registers
120
and
122
, and signal charges which have become unnecessary in the first and second si

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