Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2002-02-19
2003-07-29
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S931000
Reexamination Certificate
active
06599814
ABSTRACT:
FIELD OF THE INVENTION
The present invention is related to a method for removal of silicon carbide layers and in particular amorphous SiC of a substrate.
The present invention is also related to an integrated circuit implementing said method.
BACKGROUND OF THE INVENTION
SiC (Silicon Carbide), particularly amorphous SiC, is known as a chemically very stable component. In semiconductor processing, many modules, defined as a set of subsequent basic steps, require the presence of a thin layer which remains substantially unaffected by the operation being performed, i.e. so-called semi-inert layers. Particularly, such a semi-inert layer can be used as a hard mask layer during dry etch, or as an etch stop layer during wet/dry etch, or as stopping layer for a Chemical-Mechanical polishing process (CMP) or for many other applications. For instance, these semi-inert layers can also be used as diffusion barrier layers. Due to it's high chemical stability, the use of a SiC layer as a semi-inert layer may have benefits over other materials such as silicon dioxide and silicon nitride, especially for those applications where selectivity to the operation being performed is of high importance for successful implementation. In addition, SiC layers may be superior in terms of barrier properties.
Document U.S. Pat. No. 5,818,071 is related to interconnect structures incorporating a silicon carbide layer as a diffusion barrier layer particularly between a dielectric and a highly conductive metal layer with a resistivity less than about 2.5 microhm-centimetres. Document U.S. Pat. No. 5,818,071 does not disclose the use of a silicon carbide layer as an etch stop layer and a diffusion barrier layer in pre-metal dielectric structures, particularly between a silicide layer and a dielectric. U.S. Pat. No. 5,818,071 does not disclose how to pattern or to remove the silicon carbide layer selectively to the underlying layer, in casu a metal layer.
Although a silicon carbide layer is a very attractive layer to use in semiconductor processing and particularly in interconnect structures and dielectric structures, its high chemical stability can also be fits biggest disadvantage. SiC suffers from the fact that it is very difficult (if not impossible at all) to remove and particularly to remove it selectively. Some examples of process flows where such removal is required are: the stopping layers in the CMP operations for definition of field area's using the shallow trench isolation approach; and the use as etch stop layers for contact and via definition, where the process flow requires the selective removal of the etch stop layer at the bottom of the contact/via to obtain low contact/via resistance. Another example is also related to the use of SiC as a stopping layer in CMP applications. The cleaning after CMP usually relies on under-etching of the particles/residues. This requires that the surface from which particles and/or residues need to be removed can be etched isotropically in a very controlled way. However, due to the high chemical stability of SiC, particles and/or residues on top of the SiC layer can not be under-etched and therefore, cleaning becomes rather difficult.
Document EP-A-0845803 discloses the removal of a surface portion of a crystalline SiC film. First, defects are introduced in the top layer, thereafter, the top layer is converted into a silicon oxide layer by a thermal oxidation treatment typically at a temperature of 1100° C. This renders this process unsuited for use in interconnect structures and pre-metal dielectric (PMD) structures because active devices are already defined and therefore only limited thermal treatments can be applied, i.e. typically 600° C. or below. Moreover, the silicide layers in the PMD structures, are also not compatible with temperatures above 650° C., while most metal features in the interconnect structures are not compatible with temperatures typically above about 400° C.
AIMS OF THE INVENTION
It is an aim of the invention to remove exposed layers of a SiC layer by converting at least a major part of said SiC layer in silicon (di)oxide or silicon oxide based layers. Particularly this conversion is performed at low temperatures, preferably 600° C. or below, in an oxygen-containing plasma. Thereafter the converted part of said SiC layer is removed.
It is a further aim of the invention to provide a method for fabricating an interconnect structures, including PMD structures, using SiC as etch stop layer and/or diffusion barrier layer by using the afore-mentioned method for in-situ selective removal of exposed layers of the SiC layer.
It is still a further aim of the invention to provide an interconnect structure, particularly a PMD structure wherein a SiC layer can be used as an etch stop layer between a conductive layer and the surrounding dielectric.
SUMMARY OF THE INVENTION
This invention is about the selective removal of exposed layers of SiC layers which allows the use of this highly chemically stable material for a wide range of applications. At least for the purpose of this disclosure a carbide-silicon layer is an insulating layer being composed of at least Si and C, e.g., but not limited hereto, SiC, or at least Si, C and O, e.g. silicon oxycarbide, or at least Si, C and N, e.g. nitrided silicon carbide (SiNC) or at least Si, N, O and C, e.g. nitrided silicon oxycarbide (SiNOC), or at least Si, C and H e.g. amorphous hydrogenated silicon carbide (SiC:H), or at least Si, C, N and H, e.g. hydrogenated SiNC, or at least Si, O, C, N and H, e.g. hydrogenated SINOC. For the purpose of this disclosure, an oxide-silicon layer is a layer composed of at least Si and O, e.g. silicon (di)oxide, or of Si, O and a smaller fraction of C and/or a smaller fraction of N and/or a smaller fraction of H, for example silicon (di)oxide wherein the fraction of C and/or N and/or H smaller is than the fraction of O.
In an aspect of the invention, a method for removing at least partly an exposed part of a carbide-silicon layer formed on a substrate is disclosed comprising the steps of:
converting at least paritly said exposed part of said carbide-silicon layer into an oxide-silicon layer by exposing said carbide-silicon layer to an oxygen containing plasma,
removing said oxide-silicon layer from said substrate.
Said exposed part can be, but is not limited hereto, an exposed part in an opening or can De at least an exposed part of a layer.
This method can be applied in-situ. The substrate can be, but is not limited hereto, a partly processed or a pristine wafer or slice of a semi-conductive material, like Si or Ga As or Ge, or an insulating material, e.g. a glass slice, or a conductive material. Said substrate can comprise a patterned conductive layer. Particularly, in case said substrate is a partly processed wafer or slice; at least a part of the active and/or passive devices can already be formed and/or at least a part of the structures interconnecting these devices can be formed.
For the purpose of this disclosure, plasma should be understood as a conventional plasma such as a reactive ion etch (RIE) plasma or a chemical vapour deposition (CVD) plasma, or a plasma afterglow. By exposing said carbide-silicon layer to an oxygen-containing plasma, energy is given to the oxygen containing species, such that carbide-silicon is at least partly converted into oxide-silicon. This energy can be e.g. thermal energy or kinetic energy, e.g. by the formation of ions.
In an embodiment of the invention, a method as recited in the first aspect of this invention is disclosed, wherein said conversion step and said removal step are subsequently repeated for a number of times until said carbide-silicon layer is substantially removed.
In an embodiment of the invention, the conversion from a part of the carbide-silicon laver to an oxide-silicon layer can be performed by exposing the carbide-silicon layer to an oxygen-containing reactive ion etch (RIE) plasma. Particularly, the substrate including the carbide-silicon layer can be introduced in a pressurised chamber of a plasma-etch tool.
Dembowski Philip D.
Meynen Herman
Vanhaelemeersch Serge
Interuniversitair Microelektronica Centrum (IMEC)
Jones Day
Le Thao P
Nelms David
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