Photogate image sensor with fat zero injection on a middle...

Television – Camera – system and detail – Solid-state image sensor

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C348S302000, C348S307000

Reexamination Certificate

active

06545712

ABSTRACT:

INCORPORATION BY REFERENCE
U.S. Pat. No. 6,233,013, assigned to the assignee hereof, is hereby incorporated by reference.
FIELD OF THE INVENTION
The present invention relates to CMOS depleted-gate photosensors, or simply photogates. More specifically, the present invention relates to a system of transfer circuits by which a plurality of such photogates arranged in parallel can read out signals therefrom, such as in a full-color sensor array.
BACKGROUND OF THE INVENTION
Currently there are two prevalent basic technologies for image sensing with solid-state apparatus, such as in a television camera, digital still camera, or document scanner: the charge-coupled device, or CCD, and CMOS. These two technologies have respective practical advantages and disadvantages. Recently, however, there has become available a new sensor technology which is intended to preserve the advantages of either CCDs or CMOS. This technology is known as “CMOS active pixel image sensors” or “depleted-gate photosensors,” or most simply “photogates.” In brief, a small single-stage CCD is fabricated for each photosensor, and the output of the single CCD stage is integrated with CMOS circuitry, such as a transfer circuit. The basic technology of constructing such photogates is disclosed in Mendis, Kemeny, and Fossum, “CMOS Active Pixel Image Sensor,” IEEE Transactions on Electron Devices, Volume 41, No. 3, March 1994.
The basic structure of a photogate-based photosensor is as follows. There is disposed in a silicon structure one doped area with an exposed surface, known as a photogate, which accepts light thereon. When the photogate is exposed to light, a charge is created in the depletion layer thereof. A transfer gate is disposed next to the photogate. When it is desired to transfer the charge from the photogate, a potential is applied to the transfer gate, thus deepening the potential well there. This deepening of the potential well in the transfer gate causes the charge in the photogate to spill into the transfer gate, according to the basic CCD method. This CCD-type charge transfer occurs only once in the process, and the charge spilled into the transfer gate is converted into a voltage with associated CMOS circuitry.
Although photogates have numerous advantages, such as small size, CMOS-compatibility and relative ease of fabrication, certain problems must still be addressed in order to incorporate this technology in, for example, a full-color document scanner. In one type of full-color document scanner, there are provided three separate linear arrays, each array incorporating a relatively large number of photosensors. Each separate linear array of photosensors, is filtered with one primary color filter, such as red, blue, and green. The three primary-color-filter linear arrays are then exposed to an original document moving past, to record video signals based on the exposed document. Because each individual linear array is filtered with one primary color, the ultimate output is three color separations based on the original image. One basic problem with using photogate technology as photosensors in this context is that, with currently-known designs of photogates, the integration time of each photogate, which is analogous to the shutter exposure time in a camera, is not readily controllable for individual pixels. This lack of direct control my cause problems with accurate recording of individual color separations with the arrays of photogates. The co-pending patent application referenced above describes a system by which photogates with independently-controllable integration times can be realized.
DESCRIPTION OF THE PRIOR ART
In the prior art, the article “CMOS Active Pixel Image Sensor,” referenced above, sets forth the basic operating principle of photogates.
U.S. Pat. Nos. 4,737,854; 5,081,536; and 5,105,277 disclose methods of operating a transfer circuit in conjunction with a photodiode in a photosensor scanner. Various of the techniques described in these references involve injecting a “fat zero” bias charge on certain transistors of the transfer circuit, such as to cause one transistor in the transfer circuit to function as a metering gate, or to inject a fat zero on the photodiode itself, so that the response of the photodiode will be effectively highly linear. Significantly, each of these references is directed to the specific concerns of a photodiode, and is not directly relevant to transfer circuits for photogates, as in the claimed invention.
SUMMARY OF THE INVENTION
According to one aspect of the present invention, there is provided a photosensitive apparatus, and method of operating thereof. The apparatus comprises a first photogate, the first photogate creating a charge in response to light impinging thereon, and a first phototransfer gate associated with the first photogate, a charge in the first photogate spilling into the first phototransfer gate in response to an applied potential difference between the first photogate and the first phototransfer gate. The apparatus further comprises a second photogate, the second photogate creating a charge in response to light impinging thereon, and a second phototransfer gate associated with the second photogate, a charge in the second photogate spilling into the second phototransfer gate in response to an applied potential difference between the second photogate and the second phototransfer gate. A common node is associated with the first phototransfer gate and the second phototransfer gate, the common node being associated with an output line. A reset gate is disposed at a reset node on the output line, the reset gate adapted to selectably apply a predetermined reset potential to the reset node. A predetermined bias voltage is placed on the common node prefatory to causing a charge to pass from the common node to the reset node.


REFERENCES:
patent: 4737854 (1988-04-01), Tandon et al.
patent: 5081536 (1992-01-01), Tandon et al.
patent: 5105277 (1992-04-01), Hayes et al.
patent: 5148268 (1992-09-01), Tandon et al.
patent: 5543838 (1996-08-01), Hosier et al.
patent: 6233013 (2001-05-01), Hosier et al.
Mendis et al., “CMOS Active Pixel Image Sensor”, IEEE Transaction on Electron Devices, vol. 41, No. 3, Mar. 1994.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Photogate image sensor with fat zero injection on a middle... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Photogate image sensor with fat zero injection on a middle..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Photogate image sensor with fat zero injection on a middle... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3014399

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.