Liquid crystal cells – elements and systems – Particular excitation of liquid crystal – Electrical excitation of liquid crystal
Reexamination Certificate
2001-07-03
2003-09-23
Niebling, John F. (Department: 2871)
Liquid crystal cells, elements and systems
Particular excitation of liquid crystal
Electrical excitation of liquid crystal
C349S043000, C349S042000, C349S046000, C257S059000, C257S072000
Reexamination Certificate
active
06624856
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Applications No. 2000-206758, filed Jul. 7, 2000; and No. 2000-289987, filed Sep. 25, 2000, the entire contents of both of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a liquid crystal display device having thin film transistors for reducing leak current, and more specifically, relates to an active matrix liquid crystal display device having thin film transistors each of which is provided with a gate electrode made of shielding material.
2. Description of the Related Art
Some of liquid crystal display devices have thin film transistors as switching elements.
FIG. 13
is a partly enlarged plan view of such a kind of the conventional liquid crystal display device, and
FIG. 14
is an enlarged sectional view taken along XIV—XIV line. The liquid crystal display device is provided with a lower glass substrate
101
and an upper glass substrate
102
bonded to each other by a sealing member (not shown) formed in an approximately square frame and disposed therebetween. Liquid crystal
103
is sealed between the glass substrates
101
and
102
and inside the sealing member.
The lower glass substrate
101
is provided at predetermined portions on the upper face thereof with scanning lines
105
each including a gate electrode
104
and formed of shielding metal material. The scanning line
105
extends in a direction from left to right in FIG.
13
. The lower glass substrate
101
provided with the gate electrodes
104
and the scanning lines
105
also has on the upper face a gate insulating film
106
formed of silicon nitride or the like. There is provided a semiconductor thin film
107
formed of intrinsic amorphous silicon on a portion of the upper face of the gate insulating film
106
, which is placed directly upper the gate electrode
104
. On the upper face of the approximately central portion of the channel length of the semiconductor thin film
107
, there is provided a channel protection film
108
formed of silicon nitride or the like. The upper face of the side portions of the channel protection film
108
and the upper faces of source and drain regions of the semiconductor thin film
107
are covered with ohmic contact layers
109
and
110
formed of n-type amorphous silicon.
There are provided signal lines
112
each including a drain electrode
111
and formed of shielding metal material on the predetermined portions of the upper faces of the ohmic contact layer
109
and the gate insulating film
106
. The signal line
112
extends in a direction from the upper portion to the lower portion in FIG.
13
. The other ohmic contact layer
110
is provided on the upper face thereof with a source electrode
113
formed of shielding metal material. The above-mentioned members, i.e., the gate electrode
104
, the gate insulating film
106
, the semiconductor thin film
107
, the channel protection film
108
, the ohmic contact layers
109
and
110
, the drain electrode
111
, and the source electrode
113
constitute a thin film transistor
114
.
There is provided on the gate insulating film
106
an overcoat film
116
so as to entirely cover the thin film transistor
114
. The overcoat film
116
is provided on the predetermined portion of the upper face with a plenty of pixel electrodes
117
formed of transparent metal material such as ITO. Each of the pixel electrodes
117
is connected to the source electrode
113
of the corresponding thin film transistor through a contact hole
118
formed in the overcoat film
116
. On the other hand, there are provided a black mask
119
and a counter electrode
120
which are formed of metal material such as chromium oxide with relatively low reflectivity, such that the upper glass substrate
102
contacts with them on the lower face. The black mask
119
is formed in a rectangular frame and provided to each of the pixel electrodes so as to enclose the pixel region. The frame is shown in
FIG. 13
as a two-dot line, that is arranged to face the scanning line
105
including the gate electrode
104
and the signal line
112
including the drain electrode
111
. There is normally provided a first alignment film on the overcoat film
116
and the pixel electrode
117
on lower glass substrate
101
, a second alignment film on the counter electrode
120
formed on the glass substrate
102
.
FIGS. 13 and 14
, however, omit these alignment films.
The relationship between the gate electrode
104
and the channel protection film
108
will be described below. The channel protection film
108
is formed by the photolithography technique with use of a mask formed of photoresist subjected to the exposure from the back side (back side exposure) with use of the gate electrode
104
as a mask and the exposure from the front side (front side exposure) with use of a mask (not shown) and then developed. In the backside exposure using the gate electrode
104
as a mask, the photoresist is formed in a size a little smaller than that of the gate electrode
104
in area since light comes inside from the peripheral portion of the gate electrode
104
and the scanning line
105
.
FIG. 13
shows a value A (a distance between the edge [front edge] of the gate electrode
104
in the direction of the channel length and the edge [front edge] of the channel protection film
108
in the direction of the channel length) and a value B (a distance between the edge [side edge] of the gate electrode
104
in the direction of the channel width and the edge [side edge] of the channel protection film
108
in the direction of the channel width). They are both set around 2-3 &mgr;m, normally.
If the conventional liquid crystal display device as mentioned above is used as a transmissive display, however, light incident from the backlight (not shown) arranged on the lower face of the lower glass substrate
101
is reflected by the blackmask
119
. The reflected light transmits through the channel protection film
108
and reaches the semiconductor thin film
107
, resulting in the increase of the leak current. On the other hand, it is required now to reduce in width the scanning line
105
including the gate electrode
104
and the signal line
112
including the drain electrode
111
in order to increase the aperture ratio of the liquid crystal display device and form the device more finely. If the values A and B are set at 2-3 &mgr;m as mentioned above, however, the device cannot have larger aperture ratio or be formed more finely. If the values A and B are set smaller, however, the leak current will increase to deteriorate the OFF-performance of the thin film transistor
114
, with the result that the display performance will be adversely affected.
BRIEF SUMMARY OF THE INVENTION
The present invention is intended to provide possibility of reducing the leak current from the thin film transistor due to the reflected light transmitting through the channel protection film and reaching the semiconductor thin film of the transistor.
The liquid crystal display device according to an aspect of the present invention comprises a liquid crystal display device comprising: pixel electrodes formed of transparent conductive material; thin film transistors each provided with a gate electrode formed of shielding material and having a front edge, a rear edge, and a pair of side edges, a gate insulating film, a semiconductor thin film, a drain electrode, a source electrode, and a channel protection film smaller than the gate electrode, a thickness of the semiconductor thin film being at least 200 Å and less than 400 Å, each of the pixel electrode having a edge adjacent to the front edge and one of the side edges of the gate electrode, the source electrode extending over the front edge of the gate electrode to be connected with the pixel electrode, the channel protection film having front edge facing the front edg
Nakamura Yayoi
Shimomaki Shinichi
Watanabe Hitoshi
Casio Computer Co. Ltd.
Frishauf Holtz Goodman & Chick P.C.
Kennedy Jennifer M.
Niebling John F.
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