Method for assembling a carrier and a semiconductor device

Metal working – Method of mechanical manufacture – Electrical device making

Reexamination Certificate

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C029S830000, C029S831000, C029S834000, C029S836000, C029S841000, C156S272200, C156S274400, C228S175000, C228S180210, C228S180220

Reexamination Certificate

active

06584684

ABSTRACT:

TECHNICAL FIELD
The present invention relates generally to electronic packaging and, more particularly, to a semiconductor module and related method for electrical interconnection between a chip and the substrate of the module.
BACKGROUND OF INVENTION
One common method for electrically interconnecting a semiconductor device to an associated carrier or substrate is the flip chip attachment method. Flip chip attachment generally is accomplished by controlled collapse chip connection (“C4”). In the C4 method, small solder balls are reflowed to form the connection between matching metallized input/output (I/O) pads on both the chip and carrier mating surfaces.
The C4 attachment technology, as practiced today, has several limitations: (1) sensitivity of the current practice to irregularities in the carrier surface; (2) the requirement for a joining temperature in excess of 300° C. to melt the high-lead-content solder generally used; (3) relatively complex and costly processing steps; and (4) the general need to use lead-based solder (which may be regulated in the future due to environmental legislation).
Other electrical interconnect methods are available, but are either not well-suited for certain applications or suffer from their own drawbacks and disadvantages. For example, U.S. Pat. No. 5,045,249 issued to Jin et al. teaches electrical interconnection through a polymer medium in which electrically conductive magnetic particles are aligned using a strong magnetic field. The particles are made to penetrate the surfaces of the polymer film, offering conductive paths to mechanically connect to mating pads. One disadvantage to this method is that the connections formed by the method are merely mechanical (the connections are formed by contact of adjacent surfaces) rather than metallurgical (connections formed by fusing adjacent metal surfaces together at a molecular level). Such mechanical connections are generally not sufficiently reliable for many applications.
U.S. Pat. No. 5,019,944 issued to Ishii et al. teaches attaching pre-existing, metallic contacts to the pads of one of the opposing surfaces to be joined, and then pressing these conductive contacts through an uncured polymer film and against corresponding mating pads of the other opposing surface to be joined. To maintain the contact, the polymer is cured. Again, this process relies on a less reliable mechanical bond rather than a metallurgical bond. Furthermore, the ability to make robust connections under this method is likely to be sensitive to irregularities in one or both of the mating surfaces.
U.S. Pat. No. 4,548,862 issued to Hartman teaches a process for building a pressure-sensitive adhesive film. Anisotropic conductive paths are fabricated in the film through use of a magnetic field to align pre-existing particles embedded in the film before curing. Once again, this method disadvantageously provides only a mechanical rather than a metallurgical bond.
Another electrical interconnection method is disclosed in the IEEE publication titled “Development of High Conductivity Lead (Pb)-Free Conducting Adhesives,” by Kang et al., in IEEE Transactions on Components, Packaging, and Manufacturing Technology-Part A, Vol. 21, No. 1, pages 18-22 (March 1998). The method disclosed uses tin-coated metal particles embedded in a thermoplastic polyimide-siloxane copolymer material that can be heated to allow the tin on the particles to melt and combine metallurgically with the mating I/O pads and each other. As the thermoplastic is cooled, the polymer solidifies, freezing in place the joined particles. This practice still requires relatively high-temperature reflow to melt the tin-based particles. Furthermore, the volume of particles available for electrical connection is limited because the process erects no barrier to lateral particle interconnect that can cause shorting between pads. The need to limit metal particle volume, in turn, limits the conductivity achievable by this approach.
There is thus a need for a relatively low-cost semiconductor module and related manufacturing method for interconnecting a chip of such a module to the carrier of the module. There is a further need for the module to have robust, metallurgical connections as opposed to mechanical bonds or connections. There is a still further need for the interconnections to be tolerant of surface irregularities. There is yet a further need for the interconnections to be accomplished with less or without lead-based solder.
SUMMARY OF THE INVENTION
To meet these and other needs, and in view of its purposes, the present invention provides a method for assembling a carrier and a semiconductor device to each other. A die-attach polymer is used to adhere the device and carrier and electrically interconnect those components. The die-attach polymer includes a low density of ionized metallic particles and is applied to one or both of the surfaces to be mated to each other.
The resulting assembly is exposed to an electric field of sufficient strength to produce a controlled migration of the metallic particles to the pads of the semiconductor device, the carrier, or both components. Such migration forms anisotropic metal dendrites extending from the pads. The dendrites establish a conductive path and a metallurgical bond between the carrier and the device. Once sufficient conductive paths have been formed by the dendrites, the polymer is caused to set so as to structurally reinforce and electrically insulate from each other the metal dendrites of adjacent pads.
In one preferred embodiment of the present invention, the die-attach polymer is formed with ionic metallic particles in a size range of about 1 to about 25 micrometers, and in a volume fraction of about 5% to about 20%, which has been found to minimize instances of lateral conduction. The metallic particles may be silver, copper, or nickel, although other metals are also suitable. The polymer is advantageously applied as a film to the surface or surfaces to be joined.
In accordance with another aspect of the present invention, a small concentration of a metallic salt is also added to the polymer, preferably in a concentration of about 0.1% to about 1.0% by weight of the metallic particles in the polymer. In accordance with still another aspect of the invention, a structure is added to inhibit certain undesired migrations of the metallic particles during the application of the electric field. One form of this inhibiting structure is a planar spacer of insulating material with passages through the mater al at locations corresponding to the pads. The spacer is placed between the carrier and the semiconductor device, and the polymer is applied in a manner to enter the passages of the spacer.
In accordance with yet another aspect of the present invention, some or all of the pads to be joined to each other have portions extending outwardly from the plane of the corresponding mating surface. The dendrites which are formed by the electric field complete the required conductive paths more quickly, or can be formed with less field intensity, when they are formed on such protruding pads.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, but are not restrictive, of the invention.


REFERENCES:
patent: 4427481 (1984-01-01), Smith et al.
patent: 4548862 (1985-10-01), Hartman
patent: 4606962 (1986-08-01), Reylek et al.
patent: 5019944 (1991-05-01), Ishii et al.
patent: 5045249 (1991-09-01), Jin et al.
patent: 5188984 (1993-02-01), Nishiguchi
patent: 5534094 (1996-07-01), Arjavalingam et al.
patent: 5543585 (1996-08-01), Booth et al.
patent: 5962815 (1999-10-01), Lan et al.
patent: 6284086 (2001-09-01), Cardellino et al.
patent: 6380494 (2002-04-01), Mays et al.
patent: 6409866 (2002-06-01), Yamada
patent: 6410366 (2002-06-01), Hashimoto
patent: 6414397 (2002-07-01), Sawamoto
Kang et al., “Development of High Conductivity Lead (Pb)-Free Conducting Adhesives”, IEEE Transactions on Components, Packaging, and Manufacturing Technology—Part A, vol. 21, No. 1, pp. 18-2

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