Data processing: generic control systems or specific application – Generic control system – apparatus or process – Plural processors
Reexamination Certificate
2000-04-25
2003-07-01
Follansbee, John (Department: 2121)
Data processing: generic control systems or specific application
Generic control system, apparatus or process
Plural processors
C700S004000, C700S009000, C358S001900
Reexamination Certificate
active
06587735
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a data processing apparatus for subjecting input data such as image data to predetermined processing and outputting the processed data. More particularly, the invention relates to a data processing apparatus that is capable of executing multiple processes at high speed.
BACKGROUND OF THE INVENTION
Exchange of data such as images, voice and programs has become frequent over networks with the proliferation of network technologies. In many cases data compression (encoding) is employed to alleviate network load and transfer data at higher speeds. Encoding/decoding is performed using an encoder/decoder (referred to as a CODEC). CODECs can be realized by hardware such as a special-purpose LSI chip (these are hardware-implemented CODECs) or by software executed by a general-purpose processor (these are software-implemented CODECs). In general, a hardware-implemented CODEC is used when it is necessary to perform high-speed compression and a software-implemented CODEC is used if processing speed is not that important or when it is necessary to hold down cost. Thus, hardware CODECs are used in some cases and software CODECs in others.
In an arrangement in which not only interfaces for networks, scanners and printers but also a hardware CODEC are connected on a common bus such as a PCI bus, using the common bus has the advantages of greater diversity, ease of installation and lower cost achieved by unifying the interfaces. However, when a large number of users attempt to use the bus simultaneously, bus contention arises and processing takes time despite the fact that the CODEC employed is a hardware CODEC. For example, consider an arrangement in which a scanner, printer and hardware CODEC are connected to a common bus. In a case where processing for encoding the image data of a document read by the scanner and outputting the encoded data to another device connected on the network occurs in concurrence with processing for decoding image data received from another device and outputting this data using the printer function, requests to use the bus overlap and the processing takes time regardless of the fact that the processing is executed by a hardware CODEC.
In recent years the capabilities of general-purpose processors (CPUs) have improved and now even software CODECs can execute processing at speeds that are somewhat high.
Accordingly, an object of the present invention is to provide a data processing apparatus that is capable of executing externally supplied data at high speed.
Another object of the present invention is to provide a processor selection method that is capable of selecting the optimum processor at processing time in a data processing apparatus having a software processor for implementing prescribed data processing by software and a hardware processor for implementing the prescribed data processing by hardware.
SUMMARY OF THE INVENTION
According to one aspect of the present invention, there is provided a data processing apparatus having a software processor for implementing prescribed data processing by software and a hardware processor for implementing the prescribed data processing by hardware, wherein bus means which the hardware processor uses in the prescribed data processing can be used in other processing means as well, the apparatus comprising means for instructing the hardware processor to execute the prescribed data processing using test data, and selection means for selecting, in dependence upon time required to execute the processing of the test data, the processor to be used in the prescribed data processing executed thereafter.
According to another aspect of the present invention, there is provided a processor selection method in a data processing apparatus having a software processor for implementing prescribed data processing by software and a hardware processor for implementing the prescribed data processing by hardware, wherein bus means which the hardware processor uses in the prescribed data processing can be used in other processing means as well, said method comprising a step of instructing the hardware processor to execute the prescribed data processing using test data, and a selection step of selecting, in dependence upon time required to execute the processing of the test data, the processor to be used in the prescribed data processing executed thereafter.
According to a further aspect of the present invention, there is provided a computer readable storage medium storing a processor selection program used in a data processing apparatus having a software processor for implementing prescribed data processing by software and a hardware processor for implementing the prescribed data processing by hardware, wherein bus means which said hardware processor uses in the prescribed data processing can be used in other processing means as well, said storage medium having a program for a step of instructing said hardware processor to execute the prescribed data processing using test data, and a program for a selection step of selecting, in dependence upon time required to execute the processing of the test data, the processor to be used in the prescribed data processing executed thereafter.
According to still another aspect of the present invention, there is provided a data processing apparatus comprising a software processor for implementing prescribed data processing by software, a hardware processor for implementing the prescribed data processing by hardware, request detection means for detecting a request for the prescribed processing, and selection means for selecting the processor to be used in the prescribed data processing that has been requested.
According to still another aspect of the present invention, there is provided a processor selection method in a data processing apparatus having a software processor for implementing prescribed data processing by software and a hardware processor for implementing the prescribed data processing by hardware, said method comprising a request detection step of detecting a request for the prescribed processing, and a selection step of selecting, based upon a prescribed condition, the processor to be used in the prescribed data processing that has been requested.
According to still another aspect of the present invention, there is provided a computer-readable storage medium storing a processor selection program used in a data processing apparatus having a software processor for implementing prescribed data processing by software and a hardware processor for implementing the prescribed data processing by hardware, said storage medium having a program for a request detection step of detecting a request for the prescribed processing, and a program for a selection step of selecting, based upon a prescribed condition, the processor to be used in the prescribed data processing that has been requested.
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patent: 5819026 (1998-10-01), Lhotak et al.
patent: 6323958 (2001-11-01), Shimizu
patent: 6343161 (2002-01-01), Uchida
patent: 6384832 (2002-05-01), Muramatsu et al.
patent: 6490055 (2002-12-01), Shimizu
Canon Kabushiki Kaisha
Fitzpatrick ,Cella, Harper & Scinto
Follansbee John
Hartman Jr. Ronald D
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