Multiplex communications – Fault recovery – Bypass an inoperative switch or inoperative element of a...
Reexamination Certificate
1998-11-23
2003-03-18
Olms, Douglas (Department: 2661)
Multiplex communications
Fault recovery
Bypass an inoperative switch or inoperative element of a...
C370S219000, C370S217000
Reexamination Certificate
active
06535479
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a hitless switching system of an ATM switch, and more particularly to a hitless switching system of an ATM switch which has a discard priority control function.
2. Description of the Related Art
A first conventional example of a hitless switching system is described in, for example, Japanese Laid Open Patent Application (JP-A-Heisei 9-83529). In this reference, hitless switching is realized by adjusting cell flows on 2-system transmission paths with redundant structure in phase. In an ATM cell flow control apparatus, a cell phase control is performed without influence of a policing function, even if the policing function is added to perform a discard control of any violation cell in the cell flow on each of 2-system transmission paths. In this method, a delay adjustment is performed to reception signals on 2-system transmission paths, which signals are shifted in phase due to the influence of the length difference between the duplicated transmission paths. Thus, the phases of the duplicated reception signals are matched to each other. In this way, the hitless switching is realized. A phase comparing circuit is provided at the front stage of the policing circuit, such that it is possible to avoid that a phase comparing operation is not correctly performed due to the influence of cell discarding by the policing circuit.
As a second conventional example, a hitless switching system is proposed in Japanese Laid Open Patent Application (JP-A-Heisei 8-186575), in which hitless switching is realized on the duplicated transmission paths. In the hitless switching system, like the technique which is described in the above Japanese Laid Open Patent Application (JP-A-Heisei 9-83529), the delay adjustment is performed to the reception signals of 2 systems in which phases are shifted. Thus, the duplicated reception signals are matched to each other in phase, so that the hitless switching is realized. Also, a phase comparison is performed based on the reception time of a monitoring cell which has been inserted by a transmission apparatus on the upper stream side on the transmission path.
As a third conventional example, an ATM switch is proposed in Japanese Laid Open Patent Application (JP-A-Heisei 8-139726), in which a buffer control of a hot standby system switch section is performed based on the number of cells remaining in two switch buffers. Thus, in the ATM switching system, the hitless switching is realized with a circuit of simple structure.
FIGS. 1 and 2
show the structure of the first and second conventional examples of the hitless switching system.
As shown in
FIG. 1
, the conventional ATM switching system has a T cell inserting circuit
411
, a branching circuit
412
, a currently acting system switch
420
, a standby system switch
430
and a selecting circuit
441
. The currently acting system switch section
420
is composed of a buffer
421
, a T cell detecting circuit
422
and a resident cell count detecting circuit
423
. The standby system switch section
430
is composed of a buffer
431
, a T cell detecting circuit
432
, a resident cell count detecting circuit
433
, a difference calculating circuit
434
and a read control circuit
435
.
Also, the structure which is shown in
FIG. 2
is composed of a threshold value comparing circuit
536
in the standby system switch
530
in addition to the structure of FIG.
1
.
The ATM switching system which is proposed in the above Japanese Laid Open Patent Application (JP-A-Heisei 8-139726) shows a technique of realizing the hitless switching in the duplicated ATM switches in the apparatus. The number of cells stored in the currently acting system switch section and the number of cells stored in the standby system switch section are compared. When the number of cells stored in the currently acting system switch is larger, a cell reading operation from the standby system switch section is stopped for the difference between the number of cells stored in the currently acting system switch and the number of cells stored in the standby system switch. On the contrary, when the number of cells stored in the currently acting system switch is smaller, the reading operation address of the standby system switch section is proceeded for the difference. As a result, the number of cells stored in the standby system switch section is made to match to the number of cells stored in the currently acting system switch section. Thus, the hitless switching can be realized.
However, there is a problem in that both of the ATM cell flow control system mentioned in the above Japanese Laid Open Patent Application (JP-A-Heisei 9-83529) and the switching system mentioned in the above Japanese Laid Open Patent Application (JP-A-Heisei 8-186575) cannot be applied to the hitless switching of the ATM apparatus.
This is because both of the above conventional examples relate to the technique of realizing the hitless switching on the duplicated transmission paths. Therefore, the technique cannot be applied to the hitless switching in the switch sections of the ATM apparatus.
Also, the ATM switching system mentioned in the above Japanese Laid Open Patent Application (JP-A-Heisei 8-139726) might be applied to the hitless switching of the ATM switch. However, when the conventional ATM switching system is applied to the ATM switch having a discard priority control function, there is another problem in that the hitless switching cannot be performed.
This is because when the number of cells stored in one of the currently acting system switch section and the standby system switch section becomes larger than a threshold value of a low discard priority class while a process is performed to match the numbers of cells stored in both switch sections to each other, an input cell of the low discard priority class is discarded in one of the currently acting system switch section and the standby system switch section and stored in the other. Therefore, when the matching process is ended, the number of low discard priority class cells of the one switch section is different from that of the other switch section. In the structure shown in
FIG. 2
, the circuit for comparing threshold values is provided. However, the threshold value used in this circuit is not for the discard priority control. It is used for the determination of whether or not the cell storage states are matched.
In addition, a hitless switching system is described in Japanese Laid Open Patent Application (JP-A-Heisei 4-369140). In this reference, transmission path switching means of a transmission unit transmits an information sequence on a currently acting transmission path and a standby transmission path. Transmission path switching means of a reception unit is composed of delay inserting and removing means, delay control means and switching means. The delay inserting and removing means performs insertion or removal of a delay in units of cell lengths for a predetermined time period to the information sequence received from each transmission path. The delay control means controls the delay inserting and removing means such that the delay amounts of the information sequences are same. The switching means switches the output from the delay inserting and removing means of the currently acting system to the delay inserting and removing means of the standby system at the timing point when the delay amounts of the information sequences are same.
Also, an apparatus for matching byte phases of a transmission data in a currently acting system and standby system in an ATM communication system is described in Japanese Laid Open Patent Application (JP-A-Heisei 7-74756). In this reference, a cell head position of a readout data of a format conversion buffer
1
A of the currently acting system A from an overhead is detected by a cell position byte counting circuit
3
A and a cell position byte count corresponding to the detected byte count is notified to the standby system B. When the system is switched to the standby system B, a cell pul
Olms Douglas
Sam Phirin
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