Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Including passive device
Reexamination Certificate
2000-03-07
2003-04-22
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Including passive device
C438S326000
Reexamination Certificate
active
06551890
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to a method of manufacturing a semiconductor device comprising a bipolar transistor and a capacitor, wherein
a first layer of polycrystalline silicon is deposited on a surface of a semiconductor body, in which first layer of polycrystalline silicon there is formed a first pattern of conductors with a base electrode and a first capacitor electrode, and in which also an emitter window is etched, which is situated within the base electrode, wherein
a layer of an insulating material is applied to the upper side and the side faces of the conductors and to the wall of the window, whereafter, in succession,
the base region of the transistor in the semiconductor body is formed from an edge of the base electrode adjoining the emitter window, by implantation of ions through the emitter window and by diffusion of a dopant,
a second layer of polycrystalline silicon is deposited wherein a second pattern of conductors is formed with an emitter electrode and a second capacitor electrode, and
the emitter region of the transistor in the base region is formed from the emitter electrode by diffusion of a dopant.
Such a method enables a semiconductor device comprising a single transistor and a single capacitor to be manufactured as well as an integrated circuit comprising a plurality of these elements. The transistors have a base region and an emitter region which are formed by the emitter window formed in the base electrode. Such transistors, also referred to as polyemitter transistors, can be embodied so as to be very small, and can particularly suitably be used to process signals of very high frequency, such as mobile telephony signals. Since the capacitors are also formed on the surface of the semiconductor body, conductor tracks connecting capacitors to one another and to transistors are very short. By virtue thereof, the method can very suitably be used to manufacture integrated circuits for processing said high-frequency signals.
U.S. Pat. Ser. No. 5,336,632 describes a method of the type mentioned in the opening paragraph, wherein, after deposition of the first layer of polycrystalline silicon, the first pattern of conductors with the base electrode and the first capacitor electrode is formed first in this layer using a first anisotropic etching process. Subsequently, a first, composite layer of an insulating material is deposited on this pattern of conductors, said composite layer consisting of a bottom layer of silicon nitride, an intermediate layer of silicon oxide and a top layer of silicon nitride. Subsequently, by means of a second anisotropic etching process, the emitter window is formed both in the first, composite layer of insulating material and in the first layer of polycrystalline silicon. Next, the wall of the emitter window thus formed is provided with a layer of an insulating material by depositing a second layer of an insulating material and subsequently anisotropically etching this layer until parts thereof extending parallel to the surface have been removed again. Prior to the deposition of the second layer of polycrystalline silicon, a third etching process is carried out at the location of the first capacitor electrode to remove the top layer and the intermediate layer of the first, composite layer of insulating material. In this manner, a capacitor is formed having a relatively thin dielectric between both capacitor electrodes.
To form the pattern of conductors with a base electrode and a first capacitor electrode, and to form the emitter window situated within the base electrode, the known method employs two anisotropic etching processes. The first anisotropic etching process is used to form the pattern of conductors, the second to form the emitter window. To carry out such an etching process, a photoresist mask must be applied twice to the first layer of polycrystalline silicon. The second photoresist mask must be aligned with respect to the base electrode formed by means of the first photoresist mask.
SUMMARY OF THE INVENTION
It is an object of the invention to provide a simpler method. To achieve this, the method described in the opening paragraph is characterized in that after deposition of the first layer of polycrystalline silicon on the surface of the semiconductor body, first of all, a first layer of an insulating material is deposited on this layer, whereafter both the first pattern of conductors and the emitter window are simultaneously etched in both layers, after which the side faces of the conductors and the wall of the emitter window are simultaneously provided with a layer of an insulating material by depositing a second layer of an insulating material and anisotropically etching this layer until parts thereof extending parallel to the surface have been removed again.
The first pattern of conductors and the emitter window are simultaneously etched in the first layer of polycrystalline silicon. This requires only one photoresist mask.
The first pattern of conductors is etched in the first layer of polycrystalline silicon after this first layer has been covered with the first layer of an insulating material. Thus, after etching, the conductors are automatically provided at their upper side with a layer of an insulating material.
After the formation of the first pattern of conductors and the emitter window in the first layer of polycrystalline silicon, the second layer of insulating material is deposited and subsequently anisotropically etched until parts thereof extending parallel to the surface have been removed again. Apart from the wall of the emitter window, the side faces of the conductors are thus automatically provided with a layer of an insulating material.
The first layer of insulating material, which is deposited on the first layer of polycrystalline silicon, can be etched away over a part of its thickness at the location of the first capacitor electrode before the second capacitor electrode is formed. This results in the formation of a capacitor having a relatively thin dielectric. This can alternatively be realized, as in the known method, by depositing a composite layer as the first layer of insulating material, comprising a bottom layer, an intermediate layer and an upper layer, the intermediate and upper layer being removed at the location of the first capacitor electrode. In either case, the formation of a capacitor having a relatively large capacitance requires the deposition of a photoresist mask on the first layer of insulating material. Preferably, however, a larger capacitance is obtained by forming, in accordance with the invention, the second capacitor electrode in such a manner that it covers both the upper side and the side face of the first capacitor electrode. In the method in accordance with the invention, the side faces of the first capacitor electrode and the wall of the emitter window are simultaneously provided with a similar layer of insulating material. This layer is relatively thin. Since the second capacitor electrode extends beyond the side face of the first capacitor electrode, the side face contributes to the size of the capacitance of the capacitor. In this manner, a capacitor having a larger capacitance can be formed without employing an additional photoresist mask, and without this increase in capacitance taking up more space on the surface of the semiconductor body.
The capacitance is increased even further if, in the formation of the first pattern of conductors, a first capacitor electrode is formed which is composed of a number of mutually interconnected strips extending parallel to one another. The side faces of all strips are automatically covered with the second layer of insulating material which, as indicated hereinabove, may be very thin. In this manner a capacitor having a much larger capacitance than a stripless capacitor can be formed on a surface of the same size.
Preferably, for covering the wall of the emitter window and the side faces of the conductors, a third layer of an insulating material is deposited after the deposition of the second layer of
Dekker Ronald
Magnee Petrus H. C.
Koninklijke Philips Electronics , N.V.
Lattin Christopher
Niebling John F.
Waxler Aaron
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