Resurf EDMOS transistor and high-voltage analog multiplexer...

Details Resurf EDMOS transistor and high-voltage analog multiplexer... Resurf EDMOS transistor and high-voltage analog multiplexer...

1998-07-29

2003-05-06

Le, Dinh T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By frequency

C327S437000

Reexamination Certificate

active

06559683

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a high-voltage analog multiplexer circuit, and particularly to a RESURF (REduced SURface Field) EDMOS (Extended Drain MOS) transistor and a high-voltage analog multiplexer circuit using the same which are capable of reducing the number of required high-voltage elements and performung a stable operation, by realizing a bi-directional RESURF EDMOS element and including a high-voltage analog multiplexer having at least three inputs and a multistage high-voltage multiplexer circuit having a hierarchical structure.
2. Description of the Conventional Art
Generally, high-voltage elements include a DMOS (Double Diffused MOS) transistor, IGBT (Insulated Gate Bipolar Transistor) whose gate is insulated, and a BT (Bipolar Transistor). An LDMOS (Lateral DMOS) transistor is used for high-voltage (10V to 500V) operation, which is compatible with the CMOS VLSI for low-voltage.
Among the LDMOS transistors for high-voltage, a RESURF LDMOS is developed as an element having excellent resistance characteristics for a determined chip size and capable of easily constructing the VLSI.
Referring to
FIG. 2A
, in the RESURF LDMOS transistor, n-type impurities are ion-implanted on a P-type silicon substrate, and form a drift region, i.e., an n-well region
4
via the diffusion process and a thick thermal oxide film, i.e., a field oxide film. Thereafter, a gate oxide film and a polysilicon gate electrode
6
are formed. After self-aligning with the polysilicon gate electrode
6
, p-type impurities are ion-implanted, and a p-well
3
is formed via the diffusion process. Afterwards, using an n+ mask, n− impurities are ion-implanted, and using a p+ mask, p− impurities are ion-implanted. After depositing a silicon oxide film, an annealing is performed at a temperature between 850° C. to 1000° C. to alleviate damage generated during ion-implanting the n+ and p+ impurities. For electrical contacting of a source and a drain, the deposited silicon oxide film is etched using a contact mask, and a source contact terminal and a drain contact terminal are formed by depositing and etching a metal thin film.
However, as shown in
FIG. 2B
, the RESURF LDMOS transistor is only used as a low side driver. Particularly, as the RESURF LDMOS transistor is a mono-directional element whose source and drain are fixed, it is impossible to charge/discharge bidirectionally, and thereby it cannot be used as a push-pull type high-voltage analog multiplexer having at least three analog inputs.
Further, conventional high-voltage analog multiplexer circuits which output one input voltage of two analog input voltages include a transmission gate type, a pass transistor type and a push-pull type high-voltage analog multiplexer circuit.
First, the transmission gate type high-voltage analog multiplexer
10
, as shown in
FIG. 1A
, includes a bi-directional high-voltage transmission gate
110
having one high-voltage NMOS transistor and one high-voltage PMOS transistor, for outputting an analog voltage out via a common node
112
in accordance with an externally inputted clock signal CK
1
; and a bi-directional high-voltage transmission gate
111
having one high-voltage NMOS transistor and one high-voltage PMOS transistor, for outputting an analog input voltage V
2
via the common node
112
in accordance with an externally inputted clock signal CK
2
.
A pass transistor type high-voltage analog multiplexer having two inputs, as shown in
FIG. 1B
, includes a high-voltage NMOS transistor
113
having its source receiving the analog voltage V
1
, its gate receiving the clock signal CK
1
, and its drain connected to a common node
115
; and a high-voltage NMOS transistor
114
having its source receiving the analog voltage V
2
, its gate receiving the clock signal CK
2
, and its drain connected to the common node
115
.
Additionally, the push-pull type high-voltage analog multiplexer having two inputs, as shown in
FIG. 1C
, includes a high-voltage PMOS transistor
116
having its source receiving, the analog voltage V
1
, its gate receiving the clock signal CK
1
, and its drain connected to a common node
118
; and a high-voltage NMOS transistor
117
having its source receiving the analog voltage V
2
, its gate receiving the clock signal CK
2
, and its drain connected to the common node
118
.
The operation of the conventional high-voltage analog multiplexer having two inputs, having the above-described structure will be explained, with reference to the drawings.
First, when the analog voltages V
1
and V
2
are inputted to the transmission gates
110
and
111
of the transmission gate type high-voltage analog multiplexer
10
, the transmission gate
110
or the transmission gate
111
is turned on in accordance with the inputted clock signals CK
1
and CK
2
, and thereby the analog voltages V
1
and V
2
are selectively outputted to the common node
112
.
Further, the pass transistor type high-voltage analog multiplexer, when the analog voltages V
1
and V
2
are respectively applied to the gates of the NMOS transistors
113
and
114
, selectively outputs the analog voltages V
1
and V
2
to the common node
115
in accordance with the clock signals CK
1
and CK
2
inputted to the gates of the NMOS transistor
113
and
114
, respectively.
On the other hand, when the analog voltages V
1
and V
2
are respectively inputted to the sources of the high-voltage PMOS transistor
116
and the high-voltage NMOS transistor
117
, the push-pull type high-voltage analog multiplexer selectively outputs the analog voltages V
1
and V
2
to the common node
118
in accordance with the clock signals CK
1
and CK
2
respectively inputted to the gates of the mono-directional high-voltage PMOS transistor
116
and the mono-directional high-voltage NMOS transistor
117
.
However, in the case of the high-voltage analog multiplexer having at least three analog inputs, there are problems in that the area required for overall layout is increased due to the increase in the number of element, and the oxide film of the gate should be made thick for preventing the breakdown of the gate because the voltage level of the inputted clock signals CK
1
and CK
2
should be similar to the voltage level of the input signals V
1
and V
2
.
Further, for the pass transistor type analog multiplexer, in the case where the values of the analog voltages V
1
and V
2
are larger than the voltage level of the clock signals CK
1
and CK
2
applied at the respective gates of the high-voltage NMOS transistor
113
and
114
, there is a disadvantage in that the analog voltages V
1
and V
2
are not transmitted to the output terminal. When constructing the pass transistor type high-voltage analog rmultiplexer using two (2) mono-directional high-voltage RESURF LDMOS transistors, the source terminals of the RESURF LDMOS transistors should endure high voltages.
Additionally, in the case of constructing the push-pull type high-voltage analog multiplexer having three inputs by using the mono-directional high-voltage RESURF LDMOS transistors, one high-voltage PMOS transistor and two (2) high-voltage NMOS transistors are required. And, to normally operate the circuit, the voltage level inputted at the sources of the two NMOS transistors should be made lower than the respective clock signals of high level applied at the gates of the transistors.
SUMMARY OF THE INVENTION
Therefore, it is an object of the present invention to provide a bi-directional high-voltage RESURF EDMOS transistor which is capable of enduring a high voltage at its source terminal, by providing drift regions at both sides, i.e., the source and drain of the conventional RESURF LDMOS transistor, and exchanging the drain and source when an analog signal of high-voltage is inputted.
It is another object of the present invention to provide a high-voltage analog multiplexer circuit employing a RESURF EDMOS transistor which is capable of reducing the number of required high-voltage elements and performing a stable

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