System and method for improved throughput of semiconductor...

Material or article handling – Device for emptying portable receptacle – Nongravity type

Reexamination Certificate

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Details

C414S416080, C414S937000, C414S941000, C118S728000, C432S253000, C211S041180

Reexamination Certificate

active

06464445

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates generally to semiconductor wafer processing, and more particularly, to a system and method for improved throughput of wafers comprising an improved wafer carrier for holding additional wafers in its flat zone during processing and an improved multiple fork wafer transfer mechanism for loading and unloading wafers in the improved wafer carrier.
2. Discussion of Related Art
In the manufacture of microelectric circuits, use is commonly made of microscopic transistors and diodes in the form of generally square chips. In the manufacture of such “chips,” thin wafers are cut from rods of grown silicon crystal. Large numbers of these wafers are then treated to control their electrical conducting nature. The wafers may be subjected to washing, heating or gas diffusion treatments and thereafter diced by means of a high-speed abrasive saw into thousands of chips. The dopants used in the diffusion process may be vapors containing boron, phosphorus, or other materials.
To facilitate handling of these silicon-crystal wafers during processing, it is conventional to provide so-called “wafer boats” which are carriers or carrier frames made of high purity quartz or silicon carbide having rails with a number of wafer-receiving slots cut therein to support the wafers in vertical positions in the boat. The wafers are loaded onto the rails of the boat by a wafer transferring system, which includes forks for supporting and inserting wafers into the wafer-receiving slots. The loaded boat is placed in the reaction tube of a furnace for heating the wafers to required temperatures for processing. Each furnace can only hold one boat during a process run, and can only process wafers over a “flat zone” or highly stable temperature region of the boat.
Current wafer processing techniques can produce only a limited number of wafers. Improving productivity or “throughput” of wafers can be done by increasing the number of furnaces; however, this is costly and space-consuming.
Accordingly, an efficient, productive and effective technique and boat design for increasing load sizes and throughput of wafer processing without greatly increasing costs or space-requirements, is highly desirable.
SUMMARY OF THE INVENTION
The present invention is directed to a system and method for increasing throughput of wafer processing comprising an improved wafer carrier for holding additional wafers in its flat zone during processing and an improved multiple fork wafer transfer mechanism for loading and unloading wafers in the improved wafer carrier.
In one aspect of the present invention a system for improving throughput of semiconductor wafer processing for a wafer boat having a capacity of N product wafers is provided comprising a wafer carrier including a plurality of rails, the rails having a plurality of teeth for forming slots having a slot pitch for holding said semiconductor wafers, the wafer carrier being adapted to carry (N+y) product wafers in a flat zone while maintaining overall dimensions of the wafer boat, and a wafer transferring mechanism comprising a plurality of wafer forks for loading and removing said semiconductor wafers from the wafer carrier.
In another aspect of the present invention a method of improved throughput in processing semiconductor wafers for a wafer boat having a capacity of N product wafers is provided including the steps of providing a wafer carrier including a plurality of rails, the wafer carrier being adapted to carry an (N+y) number of product wafers in a flat zone while maintaining dimensions of the wafer boat; and providing a multiple fork wafer transfer mechanism having a plurality of wafer forks for loading and unloading the semiconductor wafers onto the wafer carrier.
These and other aspects, features, and advantages of the present invention will be described or become apparent from the following detailed description of the preferred embodiments, which is to be read in connection with the accompanying drawings.


REFERENCES:
patent: 5618351 (1997-04-01), Koble, Jr. et al.
patent: 5679168 (1997-10-01), Porter et al.
patent: 6132160 (2000-10-01), Iwai
patent: 2228048 (1990-09-01), None
patent: 8316158 (1996-11-01), None

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