DC/DC converter having a control circuit to reduce losses at...

Electric power conversion systems – Current conversion – Including d.c.-a.c.-d.c. converter

Reexamination Certificate

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C363S021060

Reexamination Certificate

active

06466462

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a DC/DC converter and a control method thereof and, more particularly, to a DC/DC converter and a control method thereof whereby losses at a light load are reduced.
2. Description of the Prior Art
In a switching power supply or other power supply systems, a DC/DC converter is used as a device for isolatedly converting a DC input voltage to feed power to a load circuit. The DC/DC converters configured for such purposes are classified into the forward and flyback types depending on the difference in polarity between the primary and secondary windings of an isolation transformer. Examples of forward DC/DC converters are the converters disclosed in the U.S. Patents U.S. Pat. No. 4,441,146 and U.S. Pat. No. 4,959,764. Now, such a device as mentioned above is described.
FIRST EXAMPLE OF PRIOR ART DC/DC CONVERTER
FIG. 1
is the circuit diagram of a first example of a prior art DC/DC converter.
In
FIG. 1
, a symbol V
11
denotes a DC input power supply, symbols C
11
, C
12
, C
13
and C
21
denote capacitors, symbols Q
11
and Q
12
denote switching devices, symbols D
11
, D
12
, D
21
and D
22
denote diodes, symbols Np and Ns denote windings, a symbol L
21
denotes a coil, a symbol Lr denotes a leakage inductance, a symbol A denotes an error amplifier, and symbols CTL
11
and CTL
12
denote controllers. The capacitor C
13
and switching device Q
12
form an active clamp circuit, whereas the windings Np and Ns form a transformer T
1
and the D
21
and D
22
form a rectifying circuit.
The positive-voltage side of the DC input power supply V
11
is connected to one end of the capacitor C
13
and one end of the winding Np. At this point, the leakage inductance Lr of the transformer T
1
develops across those ends of the capacitor C
13
and winding Np. The other end of the capacitor C
13
is connected to one end of the switching device Q
12
. The winding Np is a primary winding, the other end of which is connected to one end of the switching device Q
11
. The switching device Q
12
is a sub-switching device, the other end of which is connected to one end of the switching device Q
11
. The switching device Q
11
is a main switching device, the other end of which is connected to the negative-voltage side of the DC input power supply V
11
.
The cathodes of the diodes D
11
and D
12
are respectively connected to one end each of the switching devices Q
11
and Q
12
. The anodes of the diodes D
11
and D
12
are respectively connected to the other ends of the switching devices Q
11
and Q
12
. The capacitors C
11
and C
12
are parallel-connected to the switching devices Q
11
and Q
12
, respectively. The diode D
11
, capacitor C
11
and switching device an Q
11
form a MOSFET, wherein one end of the switching device Q
11
serves as the drain and the other end as the source. Likewise, the diode D
12
, capacitor C
12
and switching device Q
12
form a MOSFET, wherein one end of the switching device Q
12
serves as the drain and the other end as the source.
The winding Ns is a secondary winding, one end of which is connected to the anode of the diode D
21
and the other end is connected to the anode of the diode D
22
. The diode D
21
is a forward rectifier, the cathode of which is connected to one end of the coil L
21
. The diode D
22
is a fly-wheel rectifier, the cathode of which is connected to one end of the coil L
21
. The coil L
21
is an inductance device, the other end of which is connected to one end of the capacitor C
21
. The capacitor C
21
is a smoothing capacitor, the other end of which is connected to the other end of the winding Ns. The negative end of the error amplifier A is connected to one end of the capacitor C
21
and the positive end is connected to the other end of the capacitor C
21
through a voltage reference (desired output voltage). Thus, the amplifier outputs a feedback signal which is the difference between the output voltage of the DC/DC converter and the desired output voltage. The controllers CTL
11
and CTL
12
turn on and off the switching devices Q
11
and Q
12
, respectively.
Next, specific examples of the configurations of the controllers CTL
11
and CTL
12
are shown in FIG.
2
and described. The controller CTL
11
is composed of an oscillator
11
, a pulse width modulation (PWM) circuit
12
, a delay circuit
13
, and a driver
14
. The oscillator
11
outputs an oscillation frequency signal. The PWM circuit
12
outputs a PWM signal according to the oscillation frequency signal from the oscillator
11
and the feedback signal from the error amplifier A. The delay circuit
13
delays the PWM signal of the PWM circuit
12
. The driver
14
is given the output of the delay circuit
13
, so that the driver turns on and off the switching device Q
11
. Each of these circuit elements is grounded to the negative-voltage side of the DC input power supply V
11
.
The controller CTL
12
is composed of a delay circuit
21
, a level shift circuit
22
, and a driver
23
. The delay circuit
21
is grounded to the negative-voltage side of the DC input power supply V
11
and delays the PWM signal of the PWM circuit
11
. The level shift circuit
22
is grounded to the negative-voltage side of the DC input power supply V
11
and the other end of the switching device Q
12
. Thus, the level shift circuit
22
outputs a signal whose level is shifted to a high voltage, according to the output of the delay circuit
21
and the PWM signal of the PWM circuit
12
. The driver
23
is grounded to the other end of the switching device Q
12
, and given the output of the level shift circuit
22
so that the driver turns on and off the switching device Q
12
.
Now, such a DC/DC converter as explained above is described by first referring to the general behavior thereof. The controllers CTL
11
and CTL
12
alternately turn on and off the switching devices Q
11
and Q
12
, wherein a dead time is set in order to prevent the switching devices from turning on at the same time.
As indicated by a solid-line arrow in
FIG. 1
, a current flows through the diode D
21
during the period wherein the switching device Q
11
is on and the switching device Q
12
is off. This current causes another current to be supplied to a load, which is not shown in the figure, and energizes the secondary-side coil L
21
so that energy is stored therein.
During the period before the switching device Q
11
turns off and switching device Q
12
turns on, the current flowing through the diode D
21
decreases and the current flowing through the diode D
22
increases.
As indicated by a dashed-line arrow in
FIG. 1
, a current flows through the diode D
22
during the period wherein the switching device Q
11
is off and the switching device Q
12
is on, because of the energy stored in the coil L
21
.
During the period before the switching device Q
12
turns off and switching device Q
11
turns on, the current flowing through the diode D
22
decreases and the current flowing through the diode D
21
increases.
Next, behaviors of the controllers CTL
11
and CTL
12
are described by first explaining their behaviors under a normal load, using FIG.
3
.
FIG. 3
is a timing chart showing the behavior of the DC/DC converter of
FIG. 2
under a normal load. In
FIG. 3
, a symbol (a) denotes the drain-source voltage Vds of the switching device Q
11
, a symbol (b) denotes the drain-source current Ids of the switching device Q
11
, a symbol (c) denotes the drain-source voltage Vds of the switching device Q
12
, a symbol (d) denotes the drain-source current Ids of the switching device Q
12
, a symbol (e) denotes the gate-source voltage Vgs of the switching device Q
11
, i.e., the output of the driver
14
, a symbol (f) denotes the output of the oscillator
11
, a symbol (g) denotes the output of the PWM circuit
12
, a symbol (h) denotes the output of the delay circuit
13
, a symbol (i) denotes the gate-source voltage Vgs of the switching device Q
12
, i.e., the output of the driver
23
, a symbol (j) denotes the output of the delay circuit
2

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