Semiconductor light-emitting device and method for...

Active solid-state devices (e.g. – transistors – solid-state diode – Incoherent light emitter structure – With reflector – opaque mask – or optical element integral...

Reexamination Certificate

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C257S079000, C257S099000

Reexamination Certificate

active

06469324

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to light-emitting devices and, more particularly, to light emitting devices with reduced light piping for high efficiency AlGaInP-based light emitting diodes (LED's).
2. Discussion of the Prior Art
High efficiency AlGaInP-based amber and red-orange light emitting diodes (LED) are important in applications such as the large area display, traffic signal lighting and automotive lighting. The luminescence performance of the visible LED is determined by the internal quantum efficiency and the light extraction efficiency. High quantum efficiency has been demonstrated in double heterostructure (DH) and quantum well (QW) LED. On the other hand, the light extraction efficiency of the LED is limited by the substrate absorption, the internal reflection at the chip surface and the current crowding under the contact electrode. For example, early AlGaInP LED using a circular ohmic contact has a low efficiency of 0.4 lm/W. The light emission in this device is confined to near the edge of the contact since the majority of the light is generated under and blocked by the contact metal. The prior art approach includes the use of a window layer, a current-blocking layer, a transparent conductive oxide layer and a textured surface to improve the light-extraction efficiency of the LED.
FIG. 1
is a prior art DH-LED on a transparent substrate using a window layer disclosed by F. Kish et al in U.S. Pat. No. 5,793,062. The LED contains a thick GaP window layer allowing the emitted light to escape from the top with reduced total internal reflection loss. The AlGaInP DH
12
are grown on GaAs substrate using the metalorganic vapor phase epitaxy (MOVPE) method comprising an AlGaInP lower confining layer
120
, an AlGaInP active layer
122
, and an AlGaInP upper confining layer
124
. However, the prolonged growth cycle of the 50-um thick GaP window layer
14
at a high temperature causes deterioration of the impurity doping profile and adds cost to the LED wafer. This requires the use of a second crystal growth method such as vapor phase epitaxy (VPE) to deposit the thick window layer due to the high growth rate of VPE for the growth of thick layers. In the transparent substrate (TS) LED design, the LED layer is first grown on GaAs substrate and then lifted off and bonded to a second non-absorbing substrate such as GaP
11
. A p-electrode
26
is deposited on top surface of the wafer and an n-electrode
28
is deposited on the back surface of the wafer. The TS-LED, in conjunction with a thick window layer, has been reported to show the best luminescence efficiency to date. The wafer bonding process, however, requires special attention to avoid the inclusion of foreign particulate and to reduce the build up of thermal stress during the bonding and the subsequent annealing process. The process yield is sensitive to the bonding parameters and adds extra cost to the wafer.
FIG. 2
is a prior art DH-LED on GaAs substrate
10
using a current blocking layer (CB)
22
and a distributed Bragg reflector (DBR)
20
disclosed by H. Sugawara et al in Appl. Phys.Lett. vol 61 (1992) pp. 1775. The Bragg reflector
20
was grown on GaAs substrate
10
, followed by AlGaInP DH
12
, and an n-type AlGaInP blocking layer
22
. After photolithographic definition of the blocking layer
22
, a p-type AlGaAs current spreading layer
24
was grown over the top followed by a p-GaAs contact layer
16
. The p-electrode
26
and the n-electrode
28
were formed using AuZn/Au and AuGe/Au, respectively. In this design, a current blocking layer
22
is used for current spreading whereas a DBR
20
is used to reduce substrate absorption loss. High efficiency LED has been achieved using this design. However, this method requires a second growth step after the definition of the current blocking layer. The quality of the high Al-content current spreading layer is sensitive to the oxygen contamination during the regrowth.
FIG. 3
is a prior art LED using a transparent conductive oxide (TCO) layer
30
with a contact layer
16
and a DBR
20
disclosed by B-J. Lee et al in U.S. Pat. No. 5,789,768. The LED structure is grown using MOVPE and contains an AlGaInP or AlGaAs DBR
20
deposited on GaAs substrate
10
, an AlGaInP DH
12
deposited on the DBR
20
, a Zn-doped GaP window layer
14
on the DH
12
, a p-type Zn-doped GaAs layer
16
on the window layer
14
, then over-deposited with a TCO layer
30
after an opening is defined in the center of the p-GaAs contact layer
16
. The DH
12
comprises an Si-doped AlGaInP lower cladding layer
120
, an AlGaInP active layer
122
and a Zn-doped AlGaInP upper cladding layer
124
. The GaP window layer
14
is 4-10 um thickness. The p-GaAs contact layer
16
is Zn-doped to 5×10
18
cm
−3
with a resistivity of 0.01 ohmcm. The current injection under the electrode
26
is blocked due to the Shottky contact formation between TCO layer
30
and GaP window layer
14
. The injected current diffuses away from the electrode
26
and conducts through the p-type contact layer
16
. However, the TCO is an n-type semiconductor and it forms a rectifying contact with p-type semiconductors. The resistivity of TCO is 3×10
−4
ohmcm that is two orders of magnitude higher than for a good conductor such as silver. This has limited the use of TCO to reduce the current crowding under the p-electrode
26
.
FIG. 4
is the calculated current spreading for a 250 um×250 um die and a contact pad diameter of 84 um. It is shown that a thick ITO layer is needed for efficient current spreading due to the limited conductivity of TCO. However, it is impractical to deposit thick ITO films using the conventional vacuum deposition methods. For the conventional case, the ITO film is reactively deposited at around 60 angstrom/min in 10
−4
torr oxygen partial pressure. For this reason, the prior art LED still requires the use of a current-blocking layer for current spreading even with a TCO layer on the surface. To correct the problem, an object of the present invention is to use a hybrid TCO/conductor layer for current spreading and surface light-extraction for high efficiency LED applications.
The prior LED design contains a DBR
20
at the lower interface to reduce substrate absorption. However, DBR stack
20
is only reflective for normal light incidence as in the case of the vertical cavity surface emitting laser (VCSEL) applications.
FIG. 5
shows the reflectance spectrum of a typical DBR stack comprising a stack of 20 pairs of quarter wavelength GaAs/AlInP layers. The DBR stack is nearly 40% reflective at the design wavelength of 570 nm. Due to its limited bandwidth, a separate DBR is needed for LED emitting a different color. Moreover, due to the non-directional light emission of the LED, the reflective power is much less for light entering the DBR at greater angles.
FIG. 6
shows the calculated angular variation of the reflectance of the GaAs/AlInP DBR. The reflectance of the DBR drops rapidly at an incident angle greater than about 20 degree, causing optical loss due to the light transmission into the absorbing substrate.
Even with an ideal DBR at the substrate interface, most of the emitted light is piped to the side of the chip due to TIR at the top surface. Light piping causes multiple absorption loss of the emitted light before it exits to outside of the chip. For this reason, QW LED with very thin active layers is preferred to reduce the light absorption loss in the active layer. In order to minimize absorption loss due to the light piping, another object of the present invention is to reduce the optical loss due to the light piping by maximizing the surface light extraction using a hybrid antireflective layer.
SUMMARY OF THE INVENTION
The aforementioned deficiencies are addressed, and an advance is made in the art, by employing, in a light emitting diode structure, a hybrid anti-reflection (AR) and high reflection (HR) layers comprising a TCO layer and a conductor layer for surfac

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