Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular chip input/output means
Reexamination Certificate
2001-05-23
2002-10-01
Meier, Stephen D. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
With particular chip input/output means
C257S202000
Reexamination Certificate
active
06459105
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to a method and apparatus for sawing semiconductor substrates such as wafers and, more specifically, to a wafer saw and method of using the same employing multiple indexing techniques and multiple blades for more efficient sawing and for sawing multiple die sizes and shapes from a single semiconductor wafer.
2. State of the Art
An individual integrated circuit or chip is usually formed from a larger structure known as a semiconductor wafer, which is usually comprised primarily of silicon, although other materials such as gallium arsenide and indium phosphide are also sometimes used. Each semiconductor wafer has a plurality of integrated circuits arranged in rows and columns with the periphery of each integrated circuit being rectangular. Typically, the wafer is sawn or “diced” into rectangularly shaped discrete integrated circuits along two mutually perpendicular sets of parallel lines or streets lying between each of the rows and columns thereof. Hence, the separated or singulated integrated circuits are commonly referred to as dice.
One exemplary wafer saw includes a rotating dicing blade mounted to an aluminum hub and attached to a rotating spindle, the spindle being connected to a motor. Cutting action of the blade may be effected by diamond particles bonded thereto, or a traditional “toothed” type blade may be employed. Many rotating wafer saw blade structures are known in the art. The present invention is applicable to any saw blade construction, so further structures will not be described herein.
Because semiconductor wafers in the art usually contain a plurality of substantially identical integrated circuits arranged in rows and columns, two sets of mutually parallel streets extending perpendicular to each other over substantially the entire surface of the wafer are formed between each discrete integrated circuit and are sized to allow passage of a wafer saw blade between adjacent integrated circuits without affecting any of their internal circuitry. A typical wafer sawing operation includes attaching the semiconductor wafer to a wafer saw carrier, mechanically, adhesively or otherwise as known in the art, and mounting the wafer saw carrier on the table of the wafer saw. A blade of the wafer saw is passed through the surface of the semiconductor wafer, either by moving the blade relative to the wafer, the table of the saw and the wafer relative to a stationary blade, or a combination of both. To dice the wafer, the blade cuts precisely along each street, returning back over (but not in contact with) the wafer while the wafer is laterally indexed to the next cutting location. Once all cuts associated with mutually parallel streets having one orientation are complete, either the blade is rotated 90° relative to the wafer or the wafer is rotated 90°, and cuts are made through streets in a direction perpendicular to the initial direction of cut. Since each integrated circuit on a conventional wafer has the same size and rectangular configuration, each pass of the wafer saw blade is incrementally indexed one unit (a unit being equal to the distance from one street to the next) in a particular orientation of the wafer. As such, the wafer saw and the software controlling it are designed to provide uniform and precise indexing in fixed increments across the surface of a wafer.
It may, however, be desirable to design and fabricate a semiconductor wafer having various integrated circuits and other semiconductor devices thereon, each of which may be of a different size. For example, in radio-frequency ID (RFID) applications, a battery, chip and antenna could be incorporated into the same wafer such that all semiconductor devices of an RFID electronic device are fabricated from a single semiconductor wafer. Alternatively, memory dice of different capacities, for example, 4, 16 and 64 megabyte DRAMs, might be fabricated on a single wafer to maximize the use of silicon “real estate” and reduce thiefage or waste of material near the periphery of the almost-circular (but for the flat) wafer. Such semiconductor wafers, in order to be diced, however, would require modifications to and/or replacement of existing wafer saw hardware and software.
SUMMARY OF THE INVENTION
Accordingly, an apparatus and method for sawing semiconductor wafers, including wafers having a plurality of semiconductor devices of different sizes and/or shapes therein, is provided. In particular, the present invention provides a wafer saw and method of using the same capable of “multiple indexing” of a wafer saw blade or blades to provide the desired cutting capabilities. As used herein, the term “multiple indexing” contemplates and encompasses both the lateral indexing of a saw blade at multiples of a fixed interval and at varying intervals which may not comprise exact multiples of one another. Thus, for conventional wafer configurations containing a number of equally sized integrated circuits, the wafer saw and method herein can substantially simultaneously saw the wafers with multiple blades and therefore cut more quickly than single blade wafer saws known in the art. Moreover, for wafers having a plurality of differently-sized or shaped integrated circuits, the apparatus and method herein provides a multiple indexing capability to cut non-uniform dice from the same wafer.
In a preferred embodiment, a single-blade, multi-indexing saw is provided for cutting a wafer containing variously configured integrated circuits. By providing multiple-indexing capabilities, the wafer saw can sever the wafer into differently sized dice corresponding to the configuration of the integrated circuits contained thereon.
In another preferred embodiment, a wafer saw is provided having at least two wafer saw blades spaced a lateral distance from one another and having their centers of rotation in substantial parallel mutual alignment. The blades are preferably spaced apart a distance equal to the distance between adjacent streets on the wafer in question. With such a saw configuration, multiple parallel cuts through the wafer can be made substantially simultaneously, thus essentially increasing the speed of cutting a wafer by the number of blades utilized in tandem. Because of the small size of the individual integrated circuits and the correspondingly small distances between adjacent streets on the wafer, it may be desirable to space the blades of the wafer saw more than one street apart. For example, if the blades of a two-blade saw are spaced two streets apart, a first pass of the blades would cut the first and third laterally separated streets. A second pass of the blades through the wafer would cut through the second and fourth streets. The blades would then be indexed to cut through the fifth and seventh streets, then sixth and eighth, and so on.
In another preferred embodiment, at least one blade of a multi-blade saw is independently raisable relative to the other blade or blades when only a single cut is desired on a particular pass of the carriage. Such a saw configuration has special utility where the blades are spaced close enough to cut in parallel on either side of larger integrated circuits, but use single blade capability for dicing any smaller integrated circuits. For example, a first pass of the blades of a two blade saw could cut a first set of adjacent streets defining a column of larger integrated circuits of the wafer. One blade could then be independently raised or elevated to effect a subsequent pass of the remaining blade cutting along a street that may be too laterally close to an adjacent street to allow both blades to cut simultaneously, or that merely defines a single column of narrower dice. This feature would also permit parallel scribing of the surface of the wafer to mutually isolate conductors from, for example, tie bars or other common links required during fabrication, with subsequent passage by a single blade indexed to track between the scribe lines to completely sever or singulate the adjacent portions of the waf
Akram Salman
Gochnour Derek J
Hembree David R.
Hess Michael E.
Meier Stephen D.
TraskBritt
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