Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material
Reexamination Certificate
2000-05-12
2002-12-10
Abraham, Fetsum (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Amorphous semiconductor material
C257S055000, C257S056000, C257S066000, C257S349000
Reexamination Certificate
active
06492659
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a semiconductor film having a crystalline structure formed on a substrate with an insulating surface and to a method for its fabrication, as well as to semiconductor devices employing the semiconductor film as an active layer and to a method for their fabrication. The invention particularly relates to a thin film transistor having an active layer formed with a crystalline semiconductor film. Throughout the present specification, “semiconductor device” will refer generally to a device that functions by utilizing semiconductor properties, and this includes electrooptical devices typically including active-matrix type liquid crystal display devices formed using thin film transistors, as well as electronic devices having such electrooptical devices as mounted members thereof.
BACKGROUND OF THE INVENTION
Thin film transistors (hereunder abbreviated to TFTs) have been developed that possess crystalline semiconductor films as active layers, obtained by forming amorphous semiconductor films on translucent insulating substrates such as glass and crystallizing them by laser annealing, heat annealing or the like. The principal substrates used for fabrication of such TFTs are glass substrates consisting of barium borosilicate glass or aluminoborosilicate glass. Such glass substrates have poorer heat resistance than quartz substrates but have a lower market price, and therefore offer the advantage of allowing easier manufacture of large-sized substrates.
Laser annealing is known as a crystallizing technique that can accomplish crystallization by applying high energy only onto the amorphous semiconductor film, without significantly increasing the temperature of the glass substrate. In particular, excimer lasers obtained by shortwave light output are thought to be most suited for this use. Laser annealing using excimer lasers is carried out by using an optical system to process a laser beam into a spot or line onto an irradiating surface, and scanning the irradiating surface with the processed laser light (moving the laser light irradiation position relative to the irradiating surface). For example, excimer laser annealing employing linear laser light can accomplish laser annealing of an entire irradiating surface by scanning simply in the lengthwise direction and the direction perpendicular thereto, and because of its excellent productivity it has become the main manufacturing technique for liquid crystal display devices employing TFTs.
Laser annealing can be applied for crystallization of many types of semiconductor materials. From the standpoint of TFT properties, however, the use of a crystalline silicon film as the active layer is thought to be suitable since this allows a high degree of mobility to be realized. This technique was used to achieve a monolithic liquid crystal display device having a pixel TFT forming an image section on one glass substrate and a driving circuit TFT provided around the image section.
However, crystalline silicon films fabricated by laser annealing are aggregates of multiple crystal grains whose locations and sizes are random, and therefore it has not been possible to deliberately form crystal grains at desired locations. Consequently, it has been virtually impossible to use single crystal grains to form TFT channel-forming regions, for which crystallinity is most crucial. At the interface between the crystal grains (grain boundaries), the, influence of the potential level at the recrystallization centers, trapping centers or crystal grain boundaries, which is a cause of amorphous structure or crystal defects, has resulted in reduced carrier current conveying characteristics. Because of this, the TFTs using crystalline silicon films as active layers obtained to date have not exhibited properties equivalent to those of MOS transistors fabricated on single crystal silicon substrates.
As a method of solving this problem, it has been considered an effective means to increase the crystal grain size while controlling the locations of the crystal grains to eliminate the crystal grain boundaries from the channel-forming region. For example, in “Location Control of Large Grain Following Excimer-Laser Melting of Si Thin-Films”, R. Ishihara and A. Burtsev, Japanese Journal of Applied Physics vol.37, No.3B, pp.1071-1075, 1998” there is disclosed a method for three-dimensional control of silicon film temperature distribution to achieve location control and large grain sizes of crystals. According to this method, excimer laser light is irradiated onto both sides of a wafer comprising a high-melting-point metal formed as a film on a glass substrate, a silicon oxide film with a different film thickness partially formed thereover and an amorphous silicon film formed on the surface thereof, whereby it is reported that the crystal grain size can be increased to a few &mgr;m.
The aforementioned method of Ishihara et al. is characterized by locally altering the heat characteristics of the underlying material of the amorphous silicon film, in order to control the flow of heat to the substrate to introduce a temperature gradient. However, this requires formation of a three-layer structure of a high-melting-point metal layer/silicon oxide layer/semiconductor film on the glass substrate. While it is structurally possible to form a top gate-type TFT with the semiconductor film as the active layer, the parasitic capacitor generated between the semiconductor film and the high-melting-point metal layer increases the power consumption, thus creating a problem against realization of a high-speed operation TFT.
On the other hand, if the high-melting-point metal layer also serves as a gate electrode, it can be effectively applied to a bottom gate-type or inversed stagger-type TFT. However, in the aforementioned three-layer structure, even if the thickness of the semiconductor film is eliminated, the film thickness of the high-melting-point metal layer and the silicon oxide layer will not necessarily match the film thickness suited for the crystallization step and the film thickness suited for the characteristics as a TFT element, such that it is impossible to simultaneously satisfy the optimum design for the crystallization step and the optimum design for the element structure.
Furthermore, when a non-translucent high-melting-point metal layer is formed over the entire surface of a glass substrate it is not possible to fabricate a transmitting liquid crystal display device. The high-melting-point metal layer is useful in terms of its high thermal conductivity, but the chrome (Cr) film or titanium (Ti) film that is typically used as the high-melting-point metal material exhibits a high internal stress, and therefore often produces problems of cohesion with the glass substrate. The effect of the internal stress reaches to the semiconductor film formed on the top layer, and presents a concern of acting as a force causing distortion in the formed crystalline semiconductor film.
The present invention is a technique designed to overcome such problems, whereby a crystalline semiconductor film with controlled crystal grain locations and sizes is fabricated, and the crystalline semiconductor film is used in a TFT channel-forming region to realize a TFT allowing high-speed operation. It is also an object of the invention to provide a technique whereby such a TFT can be applied to various semiconductor devices such as transmitting liquid crystal display devices and image sensors.
SUMMARY OF THE INVENTION
A means for solving the problems described above will now be explained with reference to
FIG. 1. A
translucent, insulating thermal conductive layer
2
is provided in close contact with the main surface of a substrate
1
, and an insular or stripe-shaped first insulating layer
3
is formed in a selected region of the thermal conductive layer. A second insulating layer
4
and semiconductor film
5
are laminated thereover. First, the semiconductor film
5
is formed using a semiconductor film with an amorphous structure (amorphous semiconduc
Arai Yasuyuki
Yamazaki Shunpei
Abraham Fetsum
Robinson Eric J.
Robinson Intellectual Property Law Office P.C.
Semiconductor Energy Laboratory Co,. Ltd.
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