Multilayer ceramic substrates with several metallization planes

Electricity: electrical systems and devices – Miscellaneous

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174 36, 174 685, 361409, H05K 118

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045517894

ABSTRACT:
This invention concerns a ceramic substrate for mounting semiconductor integrated circuits. The substrates include at least a first and second patterned metallization layer which respectively form conducting planes that are parallel to each other but separated by a thickness of insulation. The pattern metallization of at least the first plane includes signal conductors for joining the contacts of the integrated circuit chip to pins provided in the substrate for connecting the substrate and chip to a circuit board. In accordance with the invention, the metallization of the second plane includes shorted conductor loops that follow the contour of the signal conductors. The shorted loops of the second plane metallization includes branches which extend parallel to both lateral sides of a respective signal conductor. In accordance with the invention, the branches of the loops are joined at their ends.

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