Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
1999-10-06
2002-11-12
Yao, Kwang Bin (Department: 2664)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
Reexamination Certificate
active
06480499
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the transfer of data, for example the transmission of multiple data messages over a single transmission medium and the conversion of those messages into a form suitable for transmission.
BACKGROUND OF THE INVENTION
There is a growing market in the field of digital communication. An increasing number of households have equipment to receive digital television, satellite and cable television, telephony and internet services. Telephony systems and the internet are interactive systems over which people can send and receive information and other digital communication systems are increasingly tending towards interactivity, for example as video-on-demand systems are introduced.
Video, audio and other information (e.g. internet services), all hereinafter referred to as “data”, can be transmitted along a number of transmission media, for example over electrical or optical cable or via radio. The data can be considered to be made up of “messages”, each message being, for example, one television channel or one internet connection. To allow a plurality of messages to be sent over a single transmission channel one approach is to split the messages into parts at the transmission device, transmit each part over the transmission channel and then recombine the parts at the receiving device to reconstitute the message. Each message is thus contained in a number of parts, which can arrive at the receiving device over a period of time. Additional information can be transmitted with each segment, for example to indicate the message of which the segment forms part. Consecutively sent messages need not then form part of the same message since the receiving device can use the additional information to allow it to recombine segments of each message with each other.
One system that uses this principle is AAL5. In this system data is transmitted in the form of asynchronous transfer mode (ATM) “cells” of 53 bytes in length, of which the first 5 bytes constitute the additional information mentioned above and the other 48 bytes constitute the segment of the message. By convention each byte consists of 8 bits.
The messages themselves may be split into higher-level parts before they reach the transmission stage: for example video data can be in the form of MPEG frames.
One practical embodiment of a personal system for handling data in this form is a set-top box. This usually receives a digital data feed, forms the received data into digital messages, performs the necessary digital-to-analogue conversion and final backend processing of the messages and outputs signals suitable for use by other apparatus such as televisions, telephones or internet terminals. There is also normally provision for transmission of information (normally at a lower data rate) in the opposite direction to allow a user to operate interactive services. The reverse data can conveniently, although not necessarily be sent in the same format as the forward data.
In order to meet the demands of consumers for high data rate services such as video a set-top box should preferably be capable of receiving and transmitting at a rate of at least 1 to 10 Mbits/s and preferably of receiving at least 50 Mbits/s. This imposes very heavy demands on the processing systems that are to perform the transmitting and receiving operations, especially the segmentation of messages into parts and the reassembly of those parts. Since the set-top box is intended as a consumer product there is a particular need to provide a device for performing the transmitting and receiving operations that is as inexpensive as possible.
There are known integrated circuit systems that can perform the segmentation and re-assembly (“SAR”) functions described above for use in a personal system. Current systems fall generally into two categories, having the following characteristics:
Hardware-based Designs
Very fast dedicated SAR engines (typically 155/622 Mbits/s)
Large silicon areas
Expensive, and although they are hardware-based systems they often still require a microprocessor for control purposes
Complicated control registers and memory management data structures defined in hardware
Inflexible, which makes it difficult to adapt them to rapidly evolving new standards and markets
Software/Processor-based Designs
Relatively slow (usually sub 20 Mbits/s)
Can be inexpensive with cheap RISC (reduced instruction set computing) processors, but become uneconomic in embedded situations at high data rates (40-50 Mbits/s upwards) because expensive high performance processors are needed
Flexible, as all control and data structures are software-defined, so easier to modify as standards evolve
In fact, there are four conflicting design requirements which need to be met for widespread consumer use:
Cost Targets. To a large extent the cost of an integrated circuit SAR engine is determined by the complexity of the circuit and the die area it occupies. Known hardware-based systems generally occupy large areas and whilst low-cost RISC software-based systems are cheaper to produce, their performance is modest.
Flexibility to meet evolving standards. Hardware-based systems are generally inflexible.
Performance targets. Existing hardware-based solutions have high performance but are too expensive for many consumer applications. Existing software-based solutions are cheaper but have modest performance.
Ease of Interfacing to other parts of the system.
It is clear from the above analysis that the SAR engines currently available do not provide an effective technical and cost-effective solution.
SUMMARY OF THE INVENTION
According to a first aspect of the present invention there is provided an apparatus for re-assembling information cells, each comprising a respective part of one of a plurality of messages and cell content information indicating the identity of the message a part of which is carried, comprising
a message memory for storing the plurality of messages, each in one or more blocks, the blocks for the respective data streams being capable of being of different lengths;
a message data memory for storing, for each message, message data defining a location in the message memory, a position in the respective block and the length of one of the blocks that is to receive cells of the message;
a location memory for storing, for each message, an indication of the location of the message data stored for that message in the message data memory;
loading apparatus for receiving the cells and for each cell accessing the location memory to determine the location of the message data for the message a part of which is carried by the cell, storing the cell in the message memory at the location indicated in the message data, incrementing the message data defining said location and said position for the block in the message data memory by an amount equal to the length of the part of the message carried in the cell and comparing the incremented position with the stored length of a block for the message to determine whether the end of the block has been reached.
As each part of a message is received, the loading apparatus preferably performs an error check calculation on the segment and stores the result for the respective message in the message data memory.
On receiving in a cell error check information for a message, the loading apparatus preferably compares that error check information with the stored error check information.
The location memory is suitably a content addressable memory. The apparatus is preferably provided on a single integrated circuit. Preferably the integrated circuit comprises a Central Processing Unit (CPU). At least part of the message data memory is preferably provided separately from the integrated circuit.
The cells are preferably ATM cells. The length of the part of the message carried in each cell is suitably 384 bits.
According to a second aspect of the present invention there is provided a method for receiving a plurality of data streams over a data channel, the method comprising performing the steps set out above in relation to t
Carey John
Panesar Gajinder Singh
Richards Neil
Thompson Peter
Jones Prenell
Morris James H.
Skrivanek, Jr. Robert A.
STMicroelectronics Limited
Wolf Greenfield & Sacks P.C.
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