Liquid crystal display device

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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C345S100000, C345S211000

Reexamination Certificate

active

06462725

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a liquid crystal display device, and in particular to a liquid crystal display device provided with a gate driver compatible with both the so-called Cs-on-common structure and the so-called Cs-on-gate structure.
BACKGROUND OF THE INVENTION
Conventionally, liquid crystal display devices using the active matrix driving method, provided with TFT (thin-film transistor) elements as switching elements for selective driving of pixel electrodes, are known (see Japanese Unexamined Patent Publication Nos. 3-177890/1991 (Tokukaihei 3-177890, published on Aug. 1, 1991) and 10-274783/1998 (Tokukaihei 10-274783, published on Oct. 13, 1998). Structures for a liquid crystal panel provided in such a liquid crystal display device include the so-called Cs-on-common and Cs-on-gate structures.
As shown in
FIG. 15
, a liquid crystal display device
101
provided with a liquid crystal panel
102
having a Cs-on-common structure includes a gate driver
103
, a source driver
104
, a control circuit
105
, a power circuit
106
which is a power source for the liquid crystal driving system, and a counter electrode driving circuit
107
. The liquid crystal panel
102
includes a plurality of gate electrode lines
108
and source electrode lines
109
, extending in intersecting directions on an insulating substrate, and is driven by the active matrix driving method. In the vicinity of the areas where the respective gate and source signal lines
108
and
109
cross, the liquid crystal panel
102
is provided with pixel electrodes, TFT elements, liquid crystal capacitances, auxiliary capacitances, etc., which are structures necessary for display operations. Auxiliary capacitance electrodes are connected to a capacitance line (connected in turn to a counter electrode line connected to the counter electrode), and are all fixed at a common potential.
The counter electrode driving circuit
107
supplies a counter electrode signal AC to the counter electrode of the liquid crystal panel
102
and, via the capacitance line, to the auxiliary capacitance electrodes. The power circuit
106
applies a plurality of voltages (to be discussed below) to the gate and source drivers
103
and
104
. The control circuit
105
supplies various signals, such as a clock signal CK and a start pulse signal SP, to the gate and source drivers
103
and
104
.
The operations of the gate driver
103
are controlled based on the signals supplied by the control circuit
105
, such as the clock signal CK and the start pulse signal SP. The plurality of voltages from the power circuit
106
are applied to the gate driver
103
, which supplies signals to the plurality of gate signal lines
108
.
The operations of the source driver
104
are controlled based on the signals supplied by the control circuit
105
. The plurality of voltages from the power circuit
106
are applied to the source driver
104
, which supplies signals to the plurality of source signal lines
109
. The source driver
104
drives the pixel electrodes of the liquid crystal panel by applying voltages to the source signal lines
109
.
As shown in
FIG. 16
, the gate driver
103
is made up of a control logic
111
, a bi-directional shift register
112
, a level shifter
113
, an output circuit
114
, etc. The gate driver
103
is also provided with terminals for accepting input of the clock signal CK, the start pulse signal SP, a voltage VCC (power source voltage), a voltage GND (ground voltage), and a voltage VDD, and is provided with a plurality of output terminals OS
1
through OSn.
The control logic
111
generates and supplies to the bi-directional shift register
112
a signal necessary for the operation thereof. The bidirectional shift register
112
, upon receipt of the clock signal CK and the start pulse signal SP, performs shift operations to successively synchronize the start pulse signal SP with the clock signal CK. The bi-directional shift register
112
generates and outputs to the level shifter
113
selection pulses for selecting which pixel electrodes of the liquid crystal panel
102
are to be driven by application of voltage to the source signal lines
109
by the source driver
104
. The level shifter
113
converts the voltage of each selection pulse to a level required for ON/OFF (selection
on-selection) operation of the TFT elements of the liquid crystal panel
102
, and outputs the converted voltages to the output circuit
114
.
The output circuit
114
, based on the signals received from the level shifter
113
, applies voltages of levels necessary for ON/OFF operation of the TFT elements to the gate signal lines
108
via the corresponding output terminals OS
1
through OSn. In other words, as shown in
FIG. 17
, when an input signal of voltage VCC is supplied, the output circuit
114
supplies an output signal of voltage VDD successively to the output terminals OS
1
through OSn, but when no input signal is supplied (when voltage is GND), the output circuit
114
supplies an output signal of voltage VSS to the output terminals OS
1
through OSn.
In contrast, a liquid crystal display device
121
provided with a liquid crystal panel
122
having a Cs-on-gate structure, shown in
FIG. 18
, includes a gate driver
123
instead of the gate driver
103
. Each auxiliary capacitance electrode of the liquid crystal panel
122
is connected to an adjacent gate signal line
108
. In other words, the gate signal lines
108
are also used as capacitance lines, and each electrode receives superimposed signals.
The counter electrode driving circuit
107
supplies the counter electrode signal AC to both the power circuit
106
and the counter electrode of the liquid crystal panel
122
. The power circuit
106
, based on the counter electrode signal AC supplied from the counter electrode driving circuit
107
, generates a rectangular wave signal ACK and supplies it to the gate driver
123
.
As shown in
FIG. 19
, the gate driver
123
further includes an input terminal for receiving input of the rectangular wave signal ACK. The rectangular wave signal ACK is supplied to the output circuit
114
. The output circuit
114
, based on the signal received from the level shifter
113
and the rectangular wave signal ACK, applies voltages of levels necessary for ON/OFF operation of the TFT elements to the gate signal lines
108
via the corresponding output terminals OS
1
through OSn. In other words, as shown in
FIG. 20
, when an input signal of voltage VCC is supplied, the output circuit
114
supplies an output signal of voltage VDD successively to the output terminals OS
1
through OSn, but when no input signal is supplied (when voltage is GND), the output circuit
114
supplies the rectangular wave signal ACK to the output terminals OS
1
through OSn.
As explained above, the power circuit and the gate driver for driving the gate signal lines are structured differently in a liquid crystal display device provided with a liquid crystal panel having the Cs-on-common structure and one provided with a liquid crystal panel having the Cs-on-gate structure. In other words, since liquid crystal panels of the Cs-on-common and Cs-on-gate structures use different respective methods to drive the gate signal lines, in the foregoing conventional liquid crystal display devices, it was necessary to use (install in the liquid crystal display device) one of two different types of gate driver and power circuit, depending on the structure of the liquid crystal panel. Accordingly, shortcomings of the conventional art were that the process for manufacturing liquid crystal display devices was complicated, and the liquid crystal display devices manufactured thereby were not versatile.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a liquid crystal display device able to drive gate signal lines of display means of both the so-called Cs-on-common structure and the so-called Cs-on-gate structure, using a single driving means and a single power source device.
In order to attain the foregoing object, a

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