Integrated circuit having an EEPROM and flash EPROM

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S185280, C365S185290

Reexamination Certificate

active

06501684

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to semiconductor memories, and in particular, to a semiconductor integrated circuit memory that includes both EEPROM and flash EPROM arrays.
Electrically erasable programmable read only memory (EEPROM) and flash erasable programmable read only memory (EPROM) are two known types of non-volatile memory devices.
An EEPROM device typically includes arrays of EEPROM cells arranged in rows and columns. In an EEPROM device, each group of memory cells forming a data byte (e.g., eight memory cells) is individually accessible and thus can be programmed and erased independent of the other data bytes. A conventional EEPROM cell includes a tunnel oxide through which electrons tunnel (a process commonly referred to as Fowler-Nordheim (FN) tunneling) during both programming and erase operations. Furthermore, in an EEPROM device, each memory cell has a dedicated select transistor.
A flash EPROM device typically includes arrays of flash EPROM cells arranged in rows and columns. In a flash EPROM device, erase operation is typically performed on a sector-by-sector basis, each sector including a block of cells, e.g., one or more rows or columns of cells. Therefore, all memory cells disposed in a sector are erased at once. Alternatively, if a flash EPROM array is not divided into sectors, all the flash EPROM cells disposed within the memory device are erased at once. A conventional flash EPROM cell uses hot electron injection for programming and FN tunneling for erase operations.
Flash EPROM and EEPROM devices are often used in different applications. Generally, because of its smaller size, a flash EPROM device is less expensive than an EEPROM device having the same storage capacity and is thus more widely used, for example, in mass data storage applications where reprogrammability occurs less frequently. However, where byte-by-byte reconfigurability and non-volatility is a requirement, EEPROM devices are typically used.
With the rapid growth of the battery operated portable electronic devices, there has been a parallel increase in demand for non-volatile memory devices such as EEPROMs and flash EPROMs within the same portable device. Cellular phones, for example, commonly include both types of memory devices, with the EEPROM typically storing the user reconfigurable information and the flash EPROM typically storing operating algorithms or other types of data.
The ever increasing market demands for more compact and low power electronic devices has made it desirable to combine these two types of memory arrays on the same integrated circuit housed within the same package. However, combining these two types of memories in the same integrated circuit in an efficient manner and such that each memory type maintains its flexibility (e.g., byte erasable EEPROM) has been difficult because of the divergent requirements of the flash EPROM and EEPROM cell technologies.
SUMMARY
In accordance with the present invention, a non-volatile integrated circuit memory includes an EEPROM array comprising a plurality of memory cells and a flash EPROM array comprising a second plurality of memory cells, wherein the EEPROM array is capable of being erased byte-by-byte or word-by-word, and the flash EPROM array is capable of being erased sector-by-sector.
In one embodiment, both arrays are formed using the same memory cell which is programmed using hot-electron injection and is erased using Fowler-Nordheim tunneling.
In another embodiment, a pair of byte-select transitors couple each memory cell in the EEPROM array to a corresponding bitline. The pair of byte-select transistors respectively couple the memory cell to one of a signal line and a voltage supply line.
In another embodiment, the EEPROM and the flash EPROM arrays share the same high voltage circuitry and control logic.


REFERENCES:
patent: 4758986 (1988-07-01), Kuo
patent: 5172338 (1992-12-01), Mehrotra et al.
patent: 5612913 (1997-03-01), Cappelletti et al.
patent: 5734609 (1998-03-01), Choi et al.
patent: 5747849 (1998-05-01), Kuroda et al.
patent: 5949718 (1999-09-01), Randolph et al.
patent: 5966328 (1999-10-01), Kobatake
patent: 6118706 (2000-09-01), Smayling et al.
patent: 406097455 (1994-04-01), None
patent: 10-241381 (1998-09-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Integrated circuit having an EEPROM and flash EPROM does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated circuit having an EEPROM and flash EPROM, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit having an EEPROM and flash EPROM will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2984129

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.