Amplifiers – With semiconductor amplifying device – Including differential amplifier
Reexamination Certificate
2001-01-08
2002-10-08
Lee, Benny (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including differential amplifier
C330S257000
Reexamination Certificate
active
06462619
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to operational amplifiers (“op-amps”) and more particularly to a rail-to-rail input stage of a CMOS op-amp having a constant transconductance which is independent of the common-mode input voltage.
2. Background Information
An exemplary two-stage op-amp configuration
10
is illustrated in FIG.
1
. Op-amp
10
contains amplifier stage
100
and amplifier stage
102
. Amplifier stage
100
comprises a transconductance amplifier with a differential input stage, i.e., there are two input terminals in amplifier stage
100
: negative input
106
and positive input
108
. Amplifier stage
100
is configured to provide an output current to amplifier stage
102
that is proportional to the difference in voltage between input
106
and
108
.
Amplifier stage
102
comprises a high-gain amplifier. A capacitor
104
is connected in a feedback loop between an output
110
of amplifier stage
102
and an input
112
of amplifier stage
102
. Capacitor
104
is present to ensure that the op-amp is stable when the op-amp is operated in a feedback configuration. For an amplifier stage
102
with a sufficiently large gain, the total gain of amplifier stage
100
and amplifier stage
102
is G
m
/sC, where G
m
is the transconductance of amplifier stage
100
and C is the capacitance of capacitor
104
. Thus, the op-amp has the frequency response of a low-pass amplifier, as illustrated in FIG.
2
. The gain versus frequency curve
200
shows that the gain is reasonably stable at low frequencies, but is continually reduced at higher frequencies. Corner frequency
210
is approximately the frequency at which the gain starts decreasing.
For operation, amplifiers require a power source. This power source is typically in the form of a supply voltage. While supply voltages in the range of 5 to 10 volts were largely used in the past, supply voltages have more recently decreased to below 3 volts, with supply voltages below 1 volt being introduced. At these low voltages, it is commonly desired for an op-amp to operate at input voltages close to that of the power supply to facilitate a larger range of operation. This operational characteristic is termed “rail-to-rail” operation.
An op-amp circuit using only P-type transistors can only operate within a voltage range from the negative supply rail to the positive supply rail minus the gate-source voltage, V
GS
, and the saturation voltage, V
dsat
, of a tail current source. Analogously, an op-amp circuit using only N-type transistors can operate only from the positive supply rail down to V
GS
and V
dsat
above the negative rail voltage. Accordingly, in order to achieve rail-to-rail operation, a circuit must use both P-type transistors and N-type transistors.
One circuit that illustrates a CMOS differential input stage of a rail-to-rail op-amp is shown in FIG.
3
. The input stage comprises two pairs of input transistors driven in parallel: P-type transistors
300
and
302
; and N-type transistors
304
and
306
. A current source
308
supplies the current for P-type transistors
300
and
302
while a current source
310
supplies the current for N-type transistors
304
and
306
. A negative terminal
320
and a positive terminal
322
are the input terminals for this differential amplifier. Both negative terminal
320
and positive terminal
322
are coupled to both an N-type transistor and a P-type transistor. Specifically, negative terminal
320
is coupled to P-type transistor
300
and to N-type transistor
304
; positive terminal
322
is coupled to P-type transistor
302
and N-type transistor
306
.
One problem with the circuit illustrated in
FIG. 3
is the resulting change in the transconductance of the circuit. This problem can be illustrated in the graph of
FIG. 4
, where axis
410
represents the transconductance G
m
of the circuit of FIG.
3
and axis
420
represents the common-mode input voltage.
In region
400
, only the P-type transistors are operating such that the transconductance of the circuit comprises only the transconductance of the P-type transistors. In region
404
, only the N-type transistors are operating such that the transconductance of the circuit comprises only the transconductance of the N-type transistors. Ideally, the circuit is constructed such that the transconductance of the N-type transistors is approximately the same as the transconductance of the P-type transistors. Therefore, the transconductance in region
400
is equal to the transconductance in region
404
. However, in a region
402
, wherein both pairs of transistors are operating, the transconductance of the circuit in region
402
comprises the sum of the transconductance of the N-type transistors and the transconductance of the P-type transistors. Because the transconductances for both types of transistors are ideally equal, the total transconductance in region
402
is approximately double the transconductance of the circuit in region
400
and region
404
.
It is not desirable to have a transconductance that varies with the common-mode input voltage. As explained above, the gain of an op-amp using this type of configuration is linearly related to the transconductance of amplifier stage
100
(gain=G
m
/sC). Since the gain of the op-amp is dependent on the transconductance G
m
of amplifier stage
100
, the gain of the op-amp is not constant. In addition, the frequency response of the op-amp varies if transconductance G
m
is not constant, as the time constant of the circuit varies with G
m
. Accordingly corner frequency
210
of
FIG. 2
tends to vary, resulting in an unstable frequency response.
As described in Johan H. Huijsing et al.,
Low
-
Power Low
-
Voltage VLSI Operational Amplifier Cells,
IEEE Transactions on Circuits and Systems, Vol. 42, No. 11 (November 1995), the problem described above is also present in circuits using bipolar transistors. One solution for bipolar circuits, according to Huijsing et al., is to keep constant the sum of the tail currents for the N-type transistors and for the P-type transistors.
An application of the Huijsing et al. solution to FET circuits is shown in FIG.
5
. Transistors
300
,
320
,
304
, and
306
are identical to those shown in FIG.
3
. It should be noted that the connections from transistors
300
,
320
,
304
, and
306
to the next stage are omitted to facilitate a discussion of FIG.
5
. Current source
308
is analogous to current source
308
in FIG.
3
. However, there is no separate current source for the N-type transistors. Additional transistors
526
,
528
, and
530
, along with a voltage source
524
, are configured to direct the current from current source
308
to supply the N-type transistors. Specifically, transistor
526
is a current transfer transistor while transistors
528
and
530
comprise a current mirror that supplies the current to the N-type transistors. Meanwhile, voltage source
524
biases transistor
526
such that transistor
526
is in a proper operating mode. Accordingly, the total supply current in the circuit is kept constant, i.e., the P-type transistors are directly supplied current by current source
308
, while the N-type transistors are indirectly supplied current by current source
308
through use of transistors
526
,
528
, and
530
.
At low input voltages, only P-type transistors
300
and
302
are operating, each being supplied current by current source
308
and generating output tail currents
550
and
552
at their respective drains. Although not shown, tail currents
550
and
552
may be summed and propagated to the next stage of the op-amp. At high input voltages, only N-type transistors
304
and
306
are operating. In this case, no current is being supplied to the P-type transistors. Current source
308
supplies current to the N-type transistors
304
and
306
though transistors
526
,
528
, and
530
, with resulting output tail currents
554
and
556
being present at the drains of N-type transistors
304
and
306
. Although not shown, tail curre
Ivanov Vadim V.
Zhang Shilong
Nguyen Khanh Van
Snell & Wilmer L.L.P.
Texas Instruments Incorporated
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