Semiconductor integrated circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude

Reexamination Certificate

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Details

C327S540000, C327S543000

Reexamination Certificate

active

06501303

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor integrated circuit, and more particularly relates to a semiconductor integrated circuit equipped with a circuit for sensing whether a prescribed high voltage of a voltage greater than a supply voltage is applied to a prescribed terminal in order to make it possible to select a prescribed operating mode.
2. Description of the Related Art
In the related art, technology for this field is disclosed in the following papers.
FIG. 2
in Japanese Patent Publication Laid-open No. 6-51016 shows a circuit diagram of a related semiconductor integrated circuit disclosed in this document.
This semiconductor integrated circuit has a function for determining designation of an accelerated testing mode employing a voltage higher than a normal supply voltage based on a supply voltage applied to a supply terminal and is provided with a supply voltage sensing circuit
60
, a supply voltage determining circuit
70
, and a switching circuit
80
for the purpose of providing this function.
The supply voltage sensing circuit
60
comprises a dividing section consisting of diode-connected P-channel MOS transistors (hereinafter, a MOS transistor is referred to as “MOS” and a P-channel transistor is referred to as “PMOS”)
61
and
62
, and an N-channel MOS transistor (hereinafter referred to as “NMOS”)
63
, a threshold section constituted by a PMOS
64
and an NMOS
65
, and an inverter
66
. The supply voltage determining circuit
70
comprises a comparator having PMOS's
71
and
72
and NMOS's
73
,
74
and
75
, a voltage divider consisting of resistors
76
and
77
, and an inverter
78
. The switching circuit
80
comprises inverters
81
and NMOS's
82
and
83
.
With this semiconductor integrated circuit, when the supply voltage VCC exceeds a prescribed supply voltage and rises to more than a certain fixed level at the supply voltage sensing circuit
60
, the voltage of the dividing portion rises, and a voltage of an output signal VO
1
changes from a ground voltage level (hereinafter referred to as “L”) to a supply voltage level (hereinafter referred to as “H”). Further, when the supply voltage VCC rises to more than the certain fixed level at the supply voltage determining circuit
70
, the voltage of the dividing portion becomes higher than a reference voltage VR and the voltage level of the output signal VO
2
changes from “L” to “H”.
One of the output signals VO
1
and VO
2
is supplied to a switching circuit
80
, and one of the output signals VO
1
and VO
2
is selected according to the level of a mode select
40
signal VM, with the selected output signal being outputted as an output voltage VO.
At the supply voltage sensing circuit
60
, the voltage obtained at the voltage-dividing portion of the PMOS
61
and
62
, and the NMOS
63
fluctuates dramatically due to processing factors when forming the semiconductor integrated circuit.
Such fluctuations become even larger when the number of PMOS's
61
and
62
connected in series in order to make the dividing ratio large is made large. On the other hand, at the supply voltage determining circuit
70
, a comparator included within the supply voltage determining circuit
70
is comprised of a current mirror circuit. The comparison results of the comparator are therefore substantially not influenced when the balance between the threshold voltages of the NMOS transistors
73
and
74
fluctuates due to process factors.
The output signal VO
2
can therefore be selected using a mode select signal VM from outside when a circuit for generating a reference voltage VR is provided internally. When there is no circuit for generating this reference voltage VR, output signal VO
1
can be selected.
However, the following problems exist with this related semiconductor integrated circuit.
At the supply voltage sensing circuit
60
, comparison results are influenced by fluctuations in process factors and accurate voltage detection is therefore difficult. On the other hand, at the supply voltage determining circuit
70
, comparison results can be obtained that are not influenced by fluctuations in process factors, but the voltage that can be subjected to this determination is limited by the supply voltage VCC. In order to resolve the problems with the aforementioned related art, the present invention provides a semiconductor integrated circuit that is not influenced by fluctuations of process factors having a semiconductor circuit for determining whether an arbitrary input signal voltage is a prescribed voltage higher than the supply voltage VCC.
SUMMARY OF THE INVENTION
In order to achieve the aforementioned object, the semiconductor integrated circuit of the present invention comprises a terminal applied with a supply voltage or a voltage different from the supply voltage, a voltage generating circuit, applied with a reference voltage, for generating a control voltage based on the reference voltage, a comparator, for comparing a control voltage and a voltage applied to the terminal, and outputting a comparison result signal having a voltage corresponding to comparison results and an output circuit, inputted with the comparison result signal, and outputting an output signal for setting a prescribed operation mode and having a voltage level based on the voltage level of the comparison result signal.
The concept here is therefore to provide a circuit having a circuit for generating a divided voltage at the voltage generating circuit, and a circuit configuration for generating a divided voltage, and the object of the present invention is therefore achieved with this configuration.


REFERENCES:
patent: 3675045 (1972-07-01), Mullay
patent: 3943380 (1976-03-01), Morgan et al.
patent: 5319265 (1994-06-01), Lim
patent: 5369319 (1994-11-01), Goog et al.
patent: 5396118 (1995-03-01), Yaguchi
patent: 5581206 (1996-12-01), Chevallier
patent: 5856756 (1999-01-01), Sasahara et al.
patent: 6060945 (2000-05-01), Tsay
patent: 6-51016 (1994-02-01), None

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