Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2000-02-03
2002-06-11
Smith, Matthew (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S678000, C257S698000, C257S700000
Reexamination Certificate
active
06404046
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present application concerns packaging for one or more integrated circuits, and in particular concerns a package that easily can be electrically interconnected with other packages using an interposer.
2. Description of Related Art
In the field of integrated circuit packaging, it is known to include a plurality of integrated circuits in a single package body. Bond pads of each integrated circuit are electrically connected by bond wires to leads of the package. The leads subsequently are electrically connected to metallizations on a printed circuit board. Providing a plurality of integrated circuits in one package allows an increase in package density without a significant increase in the area of the printed circuit board that is consumed by the package.
A problem with conventional packages, even packages that contain a plurality of integrated circuits, is that further increases in density per unit area of the printed circuit board are not easily attainable. So, for example, if a package includes two sixteen megabit memory integrated circuits (total thirty-two megabits), then increasing the total amount of memory to 128 megabits would require three additional packages, each of which would require additional mounting area on the printed circuit board.
SUMMARY OF THE INVENTION
The present invention allows control over the amount of area of a printed circuit board at is consumed by integrated circuit packages. It also provides easy means for electrically connecting packages to one another.
One embodiment of the present invention includes integrated circuit packages that can be stacked one on top of the other so as to form a module of electrically interconnected packages. The electrical interconnections between the stacked packages are determined by an interconnection member, viz. interposer, that is positioned between the lower and upper packages. The interconnection member comprises an insulative film with metallization layers on both of its opposing major surfaces, and metallized vias that electrically connect particular metallizations of the opposing surfaces. The metallizations on one major surface of the insulative film are electrically connected to the leads of the lower package, and the metallizations on the other major surface of the insulative film are electrically connected to the leads of the upper package. Accordingly, the interconnection member allows leads of the lower package to be electrically connected to distally located leads of the upper package, and vice versa. By using such an interposer, packages that have different lead configurations can be stacked and electrically interconnected. For example, a memory integrated circuit package may be stacked on a microprocessor integrated circuit package
These and other aspects of the present invention are presented in greater detail below and in the accompanying figures.
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Anderson Steven M.
Glenn Thomas P.
Amkor Technology Inc.
Luu Chuong A.
Parsons James E.
Skjerven Morrill LLP
Smith Matthew
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