Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
1999-03-02
2002-11-19
Chin, Wellington (Department: 2664)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S413000, C370S419000
Reexamination Certificate
active
06483841
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a device and method to be applied to a switch fabric controller, particularly applied to an Ethernet switch fabric controller for reducing circuit capacity demand or circuit size.
BACKGROUND OF THE INVENTION
As shown in
FIG. 1
, a conventional Ethernet switch fabric controller
10
for controlling the switching operation of an Ethernet switch
20
, comprises a plurality of command interpreters
13
each associated with an input port of the Ethernet switch, a read/write server
14
, and an output port buffer composed of a plurality of output port buffer units
16
. When an input port requests packet forwarding (or switching) to an output port, its packet header will be temporarily saved in the command interpreter
13
waiting for the polling by the Read/Writer Server. The Read/Writer Server periodically checks each command interpreter
13
to decode the packet header therein and forward the packet header to a corresponding output port buffer unit according to the decoding. The Ethernet switch
20
forwards the packet in the input port which has had packet header forwarded to the corresponding output port buffer unit, to the output port which is associated with the corresponding output port buffer unit.
The Read/Writer Server
14
comprises a sequential polling controller for polling each command interpreter
13
to forward the packet header in an input port to a corresponding output port buffer unit indicated by the packet header. The polling operation of an Ethernet switch fabric controller is subject to two requirements: fair and fast. Fair operation means each input port must be polled periodically with the same period or the same frequency while fast operation means Full Line Traffic characterized in that the processing time for a packet header in a Ethernet switch fabric controller shall be no more than 960 ns, in order to eliminate the possibility of Latency Delay longer than 960 ns for a packet forwarding in an Ethernet Switch Fabric controller.
The output port buffer unit is for saving packet header when there are two or more than two packet headers to be forwarded to the same output port, or when a packet header is to be forwarded to an output port which has not yet completed the processing of a packet header already saved therein.
The Ethernet switch forwards the packet in an input port (which had requested a packet switching) to an output port which corresponds to the packet header of the packet in the input port. A packet header is saved in a corresponding output port buffer unit before forwarding (or switching) of its packet is completed or processed. An overflow occurs when the number of input ports requesting packet switching to the same output port is larger than the length of the output port buffer unit. The length of an output port buffer unit means the number of memory units each for saving a packet header corresponding to the output port buffer unit. The simplest way to design the output port buffer unit is to have it composed of N memory units to avoid the overflow, with N equal to the number of input ports. For example, N equals 32 (means that the length of each of 32 output port buffer units is 32) if the number of input ports of the Ethernet switch is 32. The kind of design, however, inevitably results in a large number of logic gates in an Ethernet switch fabric controller, and leads to significantly low capacity utilization rate. For example, such a conventional design requires 32*32=1024 memory units for a system with 32 input ports. A better design is therefore strongly expected.
The length of the output port buffer unit shall be designed so as to minimize the number of logic gates required for an Ethernet switch fabric controller. The Read/Writer Server must be so designed that it can determine and/or control the forwarding operation of each packet header from a input port to an output port.
SUMMARY OF THE INVENTION
Definitions
A*B: mathematical product of A and B where A and B are any numbers.
Corresponding output port buffer unit of a packet header: the output port buffer unit with identification code corresponding to a code indicated by the packet header usually for selecting the output port to which the packet containing the packet header shall be forwarded (or switched).
Destination output port buffer unit of a packet header: the output port buffer unit with identification code corresponding to a destination address code indicated by the packet header usually for pointing to the output port to which the packet containing the packet header shall be forwarded (or switched).
Length of a buffer unit (temporary buffer unit or output port buffer unit): number of the buffer unit's memory units each for saving a packet header.
Memory unit: each memory unit for saving a packet header.
Recognize a packet header: read the code or destination address code indicated by a packet header in order to know the destination output port of the packet header.
Retrieve a packet header from an input port: move a packet header from an input port and decode the packet header to know the destination output port of the packet header.
Objects
An object of the present invention is to provide an Ethernet switch fabric controller requiring output port buffer unit of less capacity (output port buffer unit of length smaller than the number of input ports, for example) while still working with an Ethernet switch to smoothly forward the packet from an input port to an output port.
Another object of the present invention is to provide a method for designing an Ethernet switch fabric controller requiring output port buffer unit of less capacity (output port buffer unit of smaller length) while still working with an Ethernet switch to smoothly forward the packet from an input port to an output port.
A further object of the present invention is to provide an Ethernet switch fabric controller requiring less logic gates while still working with an Ethernet switch to smoothly forward the packet from an input port to an output port.
Another further object of the present invention is to provide a method for designing an Ethernet switch fabric controller composed of circuits of smaller size while still working with an Ethernet switch to smoothly forward the packet from an input port to an output port.
The present invention is characterized in that at least one temporary buffer unit is used to temporarily save a packet header when there's no available memory unit in the output port buffer unit corresponding to the packet header given that the length of the output port buffer unit is smaller than the number of input ports of the Ethernet switch.
An aspect of the present invention is a device for processing the forwarding of the packet header received by each input port of an Ethernet switch to an output port buffer unit, thereupon the Ethernet switch switches (or forwards) the packet at each input port to an output port according to the packet header in each output port buffer unit. Assume the Ethernet switch comprises M input ports and Q output ports. The device thus suggested by the present invention comprises:
Q output port buffer units each of length N;
J temporary buffer units each of length K, where J and K being integers; and
a processor possibly embodied by a CPU or logic circuit for forwarding the packet header received by the input port to a corresponding output port buffer unit in case the corresponding output port buffer unit is in a first state, the corresponding output port buffer unit is one output port buffer unit corresponding to the packet header, and forwarding, in case the corresponding output port buffer unit is in a second state, the packet header to a corresponding temporary buffer unit which is one temporary buffer unit in a first state, and forwarding the packet header in the temporary buffer unit to the output port buffer unit having at least an available memory unit and corresponding to the packet header of the data packet in the temporary buffer unit. The corresponding output port buffer un
Chang Chih-Sheng
Chang Chung-Ju
Chen Jiunn-Bin
Ma Huai-Chih
Accton Technology Corporation
Chin Wellington
Duong Frank
Hsu Winston
LandOfFree
System and method for reducing capacity demand of ethernet... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System and method for reducing capacity demand of ethernet..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for reducing capacity demand of ethernet... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2973108