Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
1999-11-01
2002-10-15
Wong, Peter S. (Department: 2838)
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
Reexamination Certificate
active
06465993
ABSTRACT:
TECHNICAL FIELD
The present invention relates to switching power supplies, and in particular, to the switch control circuitry in a switching power supply.
BACKGROUND ART
Low-voltage, high-speed computer processors present an array of complex power supply design challenges including multiple voltages, high currents, precise regulation, low noise, fast response, tight space, and cost constraints. For example, the core of a 300 MHz Intel Pentium® II processor draws up to 14.2A at a typical voltage of 2.8v, and can generate current transients of up to 13A at 30A/&mgr;sec. Future processors are likely to produce even higher rates of current consumption and even more severe load transients. Maintaining desirable regulation under such high current loads and such wide load swings pushes beyond the practical limits of conventional linear regulators. Their efficiency is too low, producing excessive heat, and requiring costly power dissipation hardware. Consequently, the trend for such applications has been to use DC—DC switching regulators, or converters, e.g., synchronous and nonsynchronous buck converters.
A buck converter works by varying the duty cycle of the power MOSFET switch it drives. For example, in a synchronous topology as shown in FIG.
1
(
a
), switch Q
1
turns on at the start of each switching cycle. A voltage equal to the supply voltage less the output voltage appears across the inductor, L. The resulting inductor current climbs and flows through the load as long as the switch Q
1
is closed. The current ramp is approximated by:
&Dgr;I
ON
=[t
ON
×&Dgr;V]/L
where &Dgr;I
ON
is the current through the inductor, t
ON
is the switch on time, &Dgr;V is the voltage across the inductor, and L is the inductance. When Q
1
is off, Q
2
, the synchronous rectification transistor, turns on and energy stored in the inductor L generates current through Q
2
and the load. The output voltage appears across the inductor, causing a current ramp approximated by:
&Dgr;I
OFF
=[t
OFF
×V
OUT
]/L
During each switching cycle, the inductor's steady-state current ramps between maximum and minimum values, yielding an average current of:
I
DC
=(I
MAX
+I
MIN
)/2
Because &Dgr;I
ON
=&Dgr;I
OFF
,
T
ON
×(V
IN
−V
OUT
)=T
OFF
×V
OUT
Thus, the volt-second product is the same during the power switch's on and off times. However, because the average inductor current equals the load current, inductor ripple current can flow through the load to ground during the power switch's off time, degrading efficiency. This is not the case for a nonsynchronous buck converter, as shown in FIG.
1
(
b
), which replaces Q
2
with a diode.
Input voltage and output voltage are related to duty cycle, which is the ratio of the power switch's on time over the total switching period:
Duty Cycle=V
OUT
/V
IN
Duty cycle is a function of the input and output voltages, and is independent of the load. In practice, under heavy loads, voltage across the inductor is reduced by resistive losses in the two MOSFET switches, circuit board traces, and the inductor itself. In addition, input voltage tends to drop with increased load. These loading losses can cause duty cycle to vary by 25% or more.
Compared to linear regulators, buck converters, because of their switching inductance, have an inherently slower output current slew rate. However, a converter's finite transient response time can be enhanced by bulk output capacitance, improving overall response to instantaneous load changes. The minimum theoretical transient response is given by:
t
RESPONSE
=(&Dgr;I×L)/&Dgr;V
where &Dgr;I is the change load current, &Dgr;V is the voltage across the inductor, and L is the inductance. For example, if V
IN
=5v, V
OUT
=2.8v, and L=2 &mgr;H, and load changes from 0.5A to 13A, the minimum transient response time is 11.4 &mgr;s.
However, the duty cycle control loops of conventional buck converters tend to operate at relatively low frequencies, and, therefore, theoretical minimum transient response times are not approached. Typically, the linear loops adjust to load changes over hundreds of microseconds and many switching cycles. To meet the fast response time of modern computer processors, such buck converter circuits require many costly, low equivalent series resistance (ESR) capacitors. A review of the most common control schemes illustrates the problem.
Of the three common control methods for buck converters—voltage mode, current mode, and ripple regulation—voltage mode control, shown in
FIG. 2
, is widely favored for its simple feedback loop. An error amplifier compares the regulator output voltage to a reference voltage, and generates a control voltage which drives one input of a comparator. The other input to the comparator is connected to a sawtooth wave generator oscillator. The comparator and its inputs serve as a pulse-width modulator (PWM) circuit that controls the MOSFET switch on-time and, therefore, its duty cycle and output voltage.
At the start of each switching cycle, with the MOSFET switched on, the sawtooth voltage ramps upward from its minimum level. When the sawtooth reaches the error amplifier output voltage level, the comparator turns off the MOSFET. This method of control requires that the error amplifier adjust its output voltage in response to line and load changes. Changes in the control voltage pass through the error amplifier and cause corresponding changes in the output voltage. For DC accuracy and stability, voltage mode control requires the control loop to have a relatively high gain and low frequency response, thereby limiting transient response.
Current mode control, shown in
FIG. 3
, employs dual feedback loops and offers improved line regulation. As with voltage control, this technique uses an error amplifier to generate a PWM control voltage. However, the current through the inductor becomes the source of the PWM sawtooth waveform. Because changes in input voltage immediately affect the slope of the inductor ramp current, duty cycle is inherently adjusted without requiring a change in the error amplifier output. Changes in the load, however, do not affect inductor current or the PWM ramp. Consequently, as with voltage mode control, load regulation requires changes in the error amplifier output voltage. Also, current mode control needs an accurate (and often bulky and costly) current sense resistor to produce a stable PWM ramp voltage, thereby reducing efficiency.
Ripple regulation, shown in
FIG. 4
, uses output voltage ripple as the PWM sawtooth which is fed to the PWM comparator. The control signal at the other comparator input is a fixed voltage. As a result, ripple regulation requires no error amplifier and achieves a fast response without the need for loop compensation. The MOSFET duty cycle adjusts quickly, pulse by pulse. Changes in line current immediately affect the inductor current and correct the output voltage. Changes in load correct the output directly. The design is simple and its component count low. The main drawback of ripple regulation, however, is that it controls the peak output ripple voltage. Thus, DC accuracy is determined by the mean output ripple voltage, and, as a result, regulation suffers. Related regulation problems include increased output voltage caused by PWM comparator and switch delays, as well as output voltage decreases caused by aging output capacitors.
A fourth method of buck converter control—V
2
™ control—combines the simple, fast response, and low component count of ripple regulation with the DC accuracy of voltage mode control. The V
2
™ method, shown in
FIG. 5
, adds an error amplifier to the ripple regulator topology, resulting in dual feedback loops as in current mode control. The output voltage generates both the ramp signal and the error signal. The V
2
™ method of control uses a ramp signal generated by the ESR of the output capacitors. This ramp is proportional to the AC current in the inductor and is offset by th
Clarkin John
Goder Dimitry
Schuellein George
Laxton Gary L.
Wong Peter S.
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