Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
1999-11-05
2002-11-12
Graybill, David E. (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257S689000, C257S791000, C257S737000, C257S738000, C257S773000
Reexamination Certificate
active
06479901
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a semiconductor device.
2. Description of the Related Art
A semiconductor device having the following configuration has heretofore been known as a technique in such a field.
In other words, a semiconductor chip or element is placed over a substrate comprised of glass epoxy or the like. Electrodes of the semiconductor element and internal electrodes formed over the substrate are respectively electrically connected to one another by wires. External electrode pads are formed over the back of the substrate and external electrodes are formed on the external electrode pads respectively. The external electrodes and wires or interconnections are electrically connected to one another via through holes defined in the substrate.
This type of technique has been disclosed in Japanese Patent Application Laid-Open No. Hei 10-209321.
SUMMARY OF THE INVENTION
An object of the present invention is to ensure a larger number of positions where through holes are formed and facilitate wire routing.
Another object of the present invention is to improve general versatility of a substrate employed in a semiconductor device.
A further object of the present invention is to restrain contamination of internal electrodes due to the seeping of an adhesive when a semiconductor element is fixed onto a substrate.
According to one aspect of the invention, for achieving the above objects, there is provided a semiconductor device comprising a plurality of external electrode pads which are placed over the back of a substrate having a semiconductor chip mounted on the surface thereof, so as to be substantially parallel with the outer periphery of the substrate, and a plurality of internal electrode pads respectively electrically connected to the external electrode pads via through holes defined in the substrate, which are formed over the surface of the substrate. The internal electrode pads are placed on the surface of the substrate, which corresponds to an area defined by areas in which the external electrode pads are formed and areas lying between the respective adjacent external electrode pads.
Typical ones of various inventions of the present application have been shown in brief. However, the various inventions of the present application and specific configurations of these inventions will be understood from the following description.
REFERENCES:
patent: 5216278 (1993-06-01), Lin et al.
patent: 5241133 (1993-08-01), Mullen et al.
patent: 5436203 (1995-07-01), Lin
patent: 5468681 (1995-11-01), Pasch
patent: 5592025 (1997-01-01), Clarke et al.
patent: 5640047 (1997-06-01), Nakashima
patent: 5805422 (1998-09-01), Otake et al.
patent: 6009620 (2000-01-01), Bhatt et al.
patent: 6060775 (2000-05-01), Ano
patent: 6084295 (2000-07-01), Horiuchi
patent: 10-209321 (1998-08-01), None
Graybill David E.
Mitchell James
Oki Electric Industry Co. Ltd.
Rabin & Berdo PC
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