DC-DC voltage boosting method and power supply circuit using...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C327S121000, C327S544000, C345S212000

Reexamination Certificate

active

06459330

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a DC-DC voltage boosting method and a power supply using the same. More particularly, the present invention relates to a DC-DC voltage boosting method and a power supply circuit of the charge pump type, which are incorporated in a voltage-boost power supply circuit for driving a liquid crystal device, or in a driver IC containing a power supply for driving a liquid crystal device.
2. Description of the Related Art
The following discussion provides the background for understanding the problems solved by the present invention. A liquid crystal device requires a high-voltage supply for driving liquid crystals, and the high-voltage power is generally obtained by DC-DC boosting.
FIG. 13
shows a configuration of a typical power supply circuit incorporated in a driver IC for driving a liquid crystal device. This IC operates by receiving a power supply voltage V
DD
at the high potential side and a power supply voltage V
SS
at low potential side. Referring to
FIG. 13
, a voltage booster circuit
10
boosts the power supply voltage V
DD
at high potential side and outputs a boosted voltage V
OUT
. The boosted voltage V
OUT
is fed to a voltage regulator circuit
20
, which outputs an operating voltage V
LCD
for operating the liquid crystal device. A voltage follower circuit
30
divides and buffers the operating voltage V
LCD
, and outputs voltages V
1
, V
2
, V
3
, and V
4
, in accordance with loads required for corresponding functions.
FIG. 14
is a circuit diagram showing an example of a configuration of the voltage booster circuit
10
, and
FIG. 15
shows an example of a configuration of the voltage regulator circuit
20
. Referring to
FIG. 14
, a P-channel transistor Q
1P
and an N-channel transistor Q
1N
are connected in series between the supply voltage V
DD
at the high potential side and the power supply voltage V
SS
at the low potential side. In parallel to the P-channel transistor Q
1P
and the N-channel transistor Q
1N
, a P-channel transistor Q
2P
and an N-channel transistor Q
2N
are connected in series. P-channel transistors Q
3
, Q
4
, and Q
5
are connected in series to the power supply voltage V
DD
at high potential side.
A capacitor C
1
is connected between the source of the transistor Q
3
and the drain of both the transistors Q
1P
and Q
1N
, and a capacitor C
2
is connected between the source of the transistor Q
4
and the drain of both the transistors Q
2P
and Q
2N
. The boosted voltage V
OUT
is obtained from the source of the transistor Q
5
.
FIG. 16
is a schematic representation showing wave formations of clock signals which are input to the voltage booster circuit shown in
FIG. 14
, in the case where the input voltage is tripled. A clock signal CL
1P
input to the gate of the transistor Q
1P
and a clock signal CL
1N
input to the gate of the transistor Q
1N
are the same. A clock signal CL
2P
input to the gate of the transistor Q
2P
and a clock signal CL
2N
input to the gate of the transistor Q
2N
are the opposition of the clock signal of CL
1P
and CL
1N
. The clock signals CL
1P
, CL
1N
, CL
2P
, and CL
2N
alternate between the power supply voltages V
DD
and V
SS
.
A clock signal CL
3
input to the gate of the transistor Q
3
and a clock signal CL
5
input to the gate of the transistor Q
5
are the opposition of the clock signal of CL
1P
and CL
IN
. A clock signal CL
4
input to the gate of the transistor Q
4
is the opposition of the clock signal of CL
2P
and CL
2N
. The clock signals CL
3
, CL
4
, and CL
5
alternate between the boosted voltage V
OUT
and the power supply voltage V
SS
.
When the booster is used to double the input voltage, the clock signals CL
2P
and CL
2N
are fixed to the supply voltage V
DD
, while the clock signal CL
5
is fixed to the supply voltage V
SS
.
When a driver IC for driving liquid crystals is of the chip-on-glass (COG) type so that the driver IC is mounted on a glass substrate, it is necessary to reduce electric terminals which connect a printed circuit substrate and a liquid crystal display device. Accordingly, the driver IC for driving liquid crystals is required to contain a charge pump capacitor for boosting a voltage.
From the viewpoint of reliability and costs, however, it is difficult to load the driver IC with large capacitors. An ability of a voltage-boost power supply to supply electric current depends on capacitance of capacitors and a frequency of switching. Therefore, switching with high frequency is required to obtain sufficient ability of the voltage-boost power supply to supply electric current.
Capacitors contained in ICs, however, always include stray capacitance. When the switching frequency increases, a reactive current due to charging and discharging of the stray capacitance also increases.
FIG. 17
shows the stray capacitance.
Referring to FIG.
17
(
a
), a lower electrode
93
of a capacitor is formed over a semiconductor substrate
91
via an insulator film
92
, and an upper electrode
95
of the capacitor is formed above the lower electrode
93
via a dielectric material
94
. Accordingly, the lower electrode
93
and the semiconductor substrate
91
carry stray capacitance C
S
between them.
Referring to FIG.
17
(
b
), an N
+
region
96
is formed in the semiconductor substrate
91
so as to be the lower electrode of the capacitor, and the upper electrode
95
is formed above the lower electrode
96
via the dielectric material
94
. Accordingly, the lower electrode
96
and the semiconductor substrate
91
carry the stray capacitance C
S
between them.
Capacitors contained in an IC must be configured such that the stray capacitance is small, and the switching frequency must be adjusted to a necessary and sufficient value.
With regard to methods for adjusting the switching frequency, the methods disclosed in Japanese Unexamined Patent Application Publication Nos. 4-162560, 5-64429, and 7-160215 are known in the art. When a load current of the voltage-boost power supply is I
OUT
, however, a current which flows through the power supply voltage V
DD
is approximately the product of I
OUT
and a boosting ratio. Thus, to reduce power consumption, the boosting ratio must be set to a minimum value which satisfies the condition that the boosted voltage V
OUT
is larger than the operating voltage V
LCD
.
The boosted voltage V
OUT
varies with the output impedance and the load current I
OUT
of the voltage-boost power supply. The output impedance varies with the capacities of capacitors and the switching frequency. Since capacitors contained in an IC are small and the switching frequency is preferably low, the output impedance of the voltage-boost power supply tends to be large. The load current I
OUT
is determined primarily by a current charged and discharged by the liquid crystal panel, and the current charged and discharged by a liquid crystal panel varies with a display mode and display contents.
Since the boosted voltage V
OUT
varies significantly with the display mode and display contents, the boosting ratio must be adjusted to a minimum value required for the corresponding display mode and display contents. According to above-described Japanese Unexamined Patent Application Publications, however, only an adjustment of the switching frequency is provided and an adjustment of the boosting ratio is not considered. The adjustment of the boosting ratio may be achieved with software control using a microprocessor unit (MPU). In such a case, however, only an adjustment in accordance with the display mode is possible, and an adjustment in accordance with the display contents cannot be achieved.
Recently, the display capacity of liquid crystal panels has been increasing, and thus the power consumption of a driver IC for driving liquid crystals has tended to increase. An increase of power consumption, however, is not acceptable even when the display capacity is large, especially with portable devices. For such devices, the power consumption is decreased as much as possible by controllin

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

DC-DC voltage boosting method and power supply circuit using... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with DC-DC voltage boosting method and power supply circuit using..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and DC-DC voltage boosting method and power supply circuit using... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2963211

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.