Piecewise-linear, non-uniform ADC

Details Piecewise-linear, non-uniform ADC Piecewise-linear, non-uniform ADC

2002-01-16

2002-12-24

Tokar, Michael (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C341S155000, C341S138000, C341S144000, C341S108000

Reexamination Certificate

active

06498577

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates in general to an analog-to-digital converter (ADC), and in particular to an ADC providing a non-uniform quantization step size over its input magnitude range, resulting in a non-linear relationship between the magnitude of its input analog signal and the value of its digital output data.
2. Description of Related Art
FIG. 1
illustrates a conventional digitizer
8
including an analog-to-digital converter (ADC)
10
for producing 255-bit thermometer code (D
255
. . . D
1
) representing the voltage magnitude of an analog input signal (INPUT). In response to each edge of an input clock signal (CLK) a linear thermometer-to-binary code converter
14
converts the 255-bit thermometer code into an 8-bit binary output data OUTPUT representing the INPUT signal magnitude.
ADC
10
includes a voltage divider
12
formed by a series of 256 resistors of similar magnitude R linked between reference voltages +VREF and −VREF to generate a set of 255 reference voltages V
1
-V
255
that are uniformly distributed within the range [−VREF, +VREF). Each of a set of 255 comparators C
1
-C
255
compares a corresponding one of reference voltages V
1
-V
255
to the INPUT signal voltage and generates a corresponding one of data bits D
1
-D
255
. Each voltage comparator C
1
-C
255
drives its output data bit to a “1” logic state when the INPUT signal voltage exceeds the comparators input reference voltage V
1
-V
255
and drives its output data bit to a “0” logic state when the INPUT signal voltage is lower than its reference voltage. Converter
14
converts the 255-bit thermometer code formed by data bits D
1
-D
255
into a corresponding 8-bit binary code ranging in value from 0 to 255.
Table I below lists values of the 255-bit thermometer code (D
255
... D
1
) and the 8-bit binary code for various voltage ranges of the INPUT signal when, for example, +VREF=+1 volt and −VREF=−1 volt.
TABLE I
INPUT
(D255 . . . D1)
OUTPUT
    −1 to −127/128
000 . . . 0000
00000000
−127/128 to −126/128
000 . . . 0001
00000001
−126/128 to −125/128
000 . . . 0011
00000010
−125/128 to −124/128
000 . . . 0111
00000011
.
.
.
.
.
.
.
.
.
+125/128 to +126/128
111 . . . 1100
11111101
+126/128 to +127/128
111 . . . 1110
11111110
+127/128 to +1
111 . . . 1111
11111111
As illustrated in Table I, ADC
10
“quantizes” the INPUT signal voltage since each value of its OUTPUT data represents a range of INPUT signal voltages rather than a discrete voltage. ADC
10
provides “uniform quantization” since the voltage ranges represented by each thermometer code data value are of similar width. In the example illustrated in Table I, the width (“quantization step size”) of each range is a uniform {fraction (1/128)} volt. Thus with +VREF and −VREF set at +1 and −1 volts, the thermometer code output of ADC
10
and the 8-bit OUTPUT data of converter
14
can representing the magnitude of the INPUT signal with {fraction (1/128)} volt resolution.
As discussed below, when a periodic CLK signal causes converter
14
to produce a sequence of OUTPUT data values in response to a time-varying INPUT signal, that data sequence is a somewhat distorted representation of the time-varying behavior of the INPUT signal due to the effects of “clipping noise” and “quantization noise”.
Clipping Noise
With −VREF and +VREF set, for example, to −1 volt and +1 volt, ADC
10
has a [−1,+1] voltage range. When the INPUT signal magnitude occasionally swings higher than +1 volt, the resulting digitizer OUTPUT data value (11111111) will misrepresent the INPUT signal magnitude as being within the range +127/128 to +1 volt. Similarly, when the INPUT signal magnitude occasionally swings below −1 volt, the resulting binary OUTPUT data value (00000000) will misrepresent the INPUT signal magnitude as being within the range −127/128 to −1 V. Hence whenever the INPUT signal magnitude swings beyond the range of the ADC, the OUTPUT data sequence will be a “clipped” representation of the INPUT signal having flattened peaks. Thus ADC
10
introduces “clipping noise” into the OUTPUT data whenever the INPUT signal magnitude goes outside the range defined by −VREF and +VREF.
One way to avoid clipping noise is to set the ADC's voltage range at least as wide as the full range of the INPUT signal. For example
FIG. 2
charts the relative probability P of each possible magnitude V
IN
of an INPUT signal when the INPUT signal's magnitude is evenly distributed in time within voltage range [−1, +1] and never goes outside that range. Obviously, if −VREF and +VREF are set to −1 V and +1 V, the OUTPUT data sequence will exhibit no clipping noise. Hence the range [−1, +1] is a good choice for ADC
10
when the INPUT signal has the uniform magnitude probability distribution of FIG.
2
.
However not all signals have magnitude probability distributions that are as uniform and conveniently limited as that of FIG.
2
. Signal magnitudes produced by many processes are “normally distributed” about some mean voltage.
FIGS. 3 and 4
chart the probability P of each possible magnitude V
IN
of two ADC example INPUT signals, each having a magnitude normally distributed about a mean of 0 volts. The standard deviation &sgr; of a normal distribution is measure of distribution's “flatness”. A signal having a normally distributed magnitude about a mean of 0 voltage will range between +&sgr; and −&sgr; volts about 63.8% of the time, and will range between +2&sgr; and −2&sgr; volts about 95.4% of the time.
FIGS. 3 and 4
indicate that the probability of occurrence is higher for INPUT signal magnitudes residing with a “high probability” portion [−&sgr;, +&sgr;] of the analog signal's range than for INPUT signal magnitudes residing in a “low probability” portion of the range [−2&sgr;, −&sgr;] or [+&sgr;, +2&sgr;]. Note that since the magnitude probability distribution of
FIG. 3
has a larger &sgr; than that of
FIG. 4
, the magnitude of a signal having the distribution of
FIG. 3
will swing outside the ADC's [−1, +1] volt range much more often than a signal having the distribution of FIG.
4
.
Note also that the high positive and negative voltages of a normally distributed signal are not limited as they are for a signal having the magnitude probability distribution illustrated in FIG.
2
. Such a signal can have a very high negative or positive voltage, but not very often. Thus when the INPUT signal is a normally distributed signal, the choice of its voltage range [−VREF, +VREF] becomes problematic. If we make the ADC range large, we can reduce the probability that the signal will swing outside the ADC's range and therefore reduce clipping noise. But in doing so we also reduce the ADC's resolution, which as discussed below, will increase quantization noise.
Quantization Noise
“Quantization noise” arises because the ADC's output thermometer code does not have infinite resolution; it quantizes the INPUT signal magnitude by representing it as being within a particular voltage range rather than as a discrete voltage level. Quantization noise causes distortion in the ADC's OUTPUT data sequence that is a function of the magnitude of the ADC's resolution, or quantization step &Dgr;. In general the uniform quantization step &Dgr; for a B-bit ADC (i.e., an ADC producing binary OUTPUT data having B-bits or the 2
B
−1 bit thermometer code equivalent thereof) is
66 =2
−B
V
R
  [1]
where V
R
is the range of the ADC. In the example ADC
10
of
FIG. 1
, where V
R
=2 volts and B=8 equation &

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