Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
2000-12-08
2002-10-22
Cunningham, Terry D. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
C327S536000
Reexamination Certificate
active
06469573
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATION
This application claims benefit of priority under 35 U.S.C. §119 to Japanese Patent Application No. 1999-269912, filed on Sep. 24, 1999, Japanese Patent Application No. 1999-351395, filed on Dec. 10, 1999, and Japanese Patent Application No. 2000-351747, filed on Nov. 17, 2000, the entire contents of which are incorporated by reference herein.
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor integrated circuit including an internal power supply circuit, such as a booster circuit for generating a driving voltage which is obtained by shifting the level of a power supply voltage. Moreover, the present invention relates to a semiconductor integrated circuit having a voltage trimming function.
A typical semiconductor memory, such as an EEPROM (Electrically Erasable and Programmable Read Only Memory) or a DRAM (Dynamic Random Access Memory), includes a booster power supply circuit for boosting an internal power supply voltage to generate a required driving voltage. A typical booster power supply circuit comprises: a booster circuit using a charging pump; an oscillator for generating a clock to drive the booster circuit; and a limiter circuit for feedback-controlling the oscillator to set and hold a driving voltage, which is obtained from the booster circuit, to be a predetermined level.
In a die sorting test for such a semiconductor memory in a wafer state, it is measured whether the levels of various voltages, such as a booster power supply output used in an element portion, are designed values, and it is tested whether basic operations, such as writing and erasing operations, can be carried out. In the wafer state, some monitoring pads are usually provided for connecting the wafer to external terminals so that such a voltage test can be carried out.
However, when a memory chip is packaged, most of monitoring pads is not bonding-connected because of a limit to the number of external terminals. Therefore, in order to analyze defective samples on the basis of a stress test and/or a reliability test before shipment, the memory chip is reassembled into a package, which can be bonding-connected to the monitoring pads, so as to be capable of monitoring an internal voltage. This does not only take a lot of time for the defective sample analysis, but also it is impossible to analyze defective places because of a failure occurring in assembly also occur.
In view of the foregoing, there is proposed a test mode function capable of transferring and outputting an output signal (a voltage determining flag), which is obtained from a limiter circuit, such as a booster power supply circuit, to an I/O terminal which is an external terminal, when a test is carried out (Japanese Patent Laid-Open 9-82895). This utilizes that the internal booster power supply circuit or the like has a limiter circuit for controlling its voltage.
However, a voltage determining flag obtained from the limiter circuit is an activating signal for feedback-controlling a booster circuit. For example, as shown in
FIG. 18
, a voltage determining flag FLG is a logical signal which has “L” before the operation of a booster circuit is started, which has “H” until an output voltage reaches a predetermined level after the operation is started, and which alternately has “H” or “L” after the output is stabilized. Thus, there is a problem in that the voltage determining flag is not suitable for a test using an LSI tester although it is suitable for waveform observation using an oscilloscope or the like. Therefore, it is desired to provide a circuit construction capable of being measured by an LSI tester from the point of view of ease and quick analysis.
SUMMARY OF THE INVENTION
The present invention has been made in view of the above described circumstances, and it is a first object of the present invention to provide a semiconductor integrated circuit capable of simply monitoring the output voltage state of an internal power supply circuit by an external terminal.
It is a second object of the present invention to provide a semiconductor integrated circuit having a voltage trimming function capable of applying a voltage, which is intended to be set in a voltage monitoring pad, from the outside to deactivate a feedback system of a limiter circuit in order to operate the value of resistance of the limiter circuit to read a limiter flag so as to carry out a voltage trimming.
In order to accomplish the above described first object, a semiconductor integrated circuit according to a first basic construction of the present invention comprises: an internal power supply circuit for generating a driving voltage which is obtained by shifting the level of a power supply voltage; a limiter circuit, which is operated by the input of a mode signal, for monitoring the driving voltage which is outputted from the internal power supply circuit, and for outputting an activating signal which has a first logical level until the driving voltage reaches a predetermined value and which has a second logical level after the driving voltage reaches the predetermined value, to activate and control the internal power supply circuit; and a monitoring circuit for detecting a first change of the activating signal from the first logical level to the second logical level after the operation of the limiter circuit is started, and for outputting a monitoring signal having a constant logical level while the limiter circuit operates after the first change of the activating signal is detected.
According to the first basic construction of the semiconductor integrated circuit, the monitoring circuit for outputting the monitoring signal, which has the constant logical level, after the timing in stabilizing the output of the internal power supply circuit, is added to the internal power supply circuit. If the monitoring signal is transmitted and outputted to the external terminal in a test mode, the output of the internal power supply circuit can be simply confirmed by an LSI tester, unlike a case where the output of the limiter circuit, which alternately has “H” or “L” after stabilizing the output, is directly monitored.
In the semiconductor integrated circuit according to the first basic construction, there may be provided a first construction of a semiconductor integrated circuit wherein the monitoring circuit is activated in a test mode, and the monitoring signal is transferred and outputted to a first external terminal.
In the semiconductor integrated circuit according to the first basic construction, there may be provided a second construction wherein the monitoring circuit comprises: a comparator, to which an external power supply voltage supplied from a second external terminal is given and which is activated in the test mode, for comparing a voltage of a monitoring node, which is provided for monitoring the driving voltage of the internal power supply circuit, with a reference voltage, which is supplied from a third external terminal, for outputting the monitoring signal; and a transfer gate for transferring the monitoring signal, which is outputted from the comparator, to the first external terminal.
In the semiconductor integrated circuit according to the second construction, the reference voltage supplied from the third external terminal may be a voltage, the level of which varies with the elapse of time so as to cross a voltage value which is to be monitored by the monitoring node.
In the semiconductor integrated circuit according to the second construction, a transfer gate driven by a boosted voltage may be provided in a path for supplying the external power supply voltage from the second external terminal to the comparator.
In the semiconductor integrated circuit according to the second construction, a transfer gate driven by the external power supply voltage or a voltage boosted therein may be provided in a path for supplying a reference voltage from the third external terminal to the comparator.
In the semiconductor integrated circuit according to the first construction, there may be provided a t
Ikehashi Tamio
Imamiya Kenichi
Kanda Kazushige
Takeuchi Ken
Banner & Witcoff , Ltd.
Cunningham Terry D.
Kabushiki Kaisha Toshiba
Tra Quan
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