Electricity: electrical systems and devices – Safety and protection of systems and devices – With specific voltage responsive fault sensor
Reexamination Certificate
2000-01-21
2002-08-20
Jackson, Stephen W. (Department: 2836)
Electricity: electrical systems and devices
Safety and protection of systems and devices
With specific voltage responsive fault sensor
C361S056000, C361S111000
Reexamination Certificate
active
06437958
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to overvoltage protection, and in particular, to an output driver to prevent reverse charge leakage and gate oxide breakdown when the voltage on the driver output exceeds the driver internal power supply voltage or when the driver is powered down.
2. Discussion of the Related Art
Many modern systems combine modules accepting different voltage levels. For example, in a laptop computer, processor modules powered by a 3.3 V voltage are combined with disk drives powered by a 5.0 V voltage. This difference in operating conditions can cause problems for the module using the lower power supply voltage. The condition of reverse charge leakage occurs when a module applies a voltage to a common bus that forces open a charge leakage path from the bus to the power supply of a module operating at a lower power supply voltage. For instance, a 3.3 V module using a PMOS pullup transistor at its output to a bus applies a 3.3 V gate voltage to turn off the PMOS transistor. However, if the bus is raised to 5.0 V by a commonly connected 5.0 V module, the PMOS transistor will be turned on, providing a conductive path from the bus to the 3.3 V power supply. Since the backgate of the 3.3 V PMOS transistor is typically tied to 3.3 V as well, the drain/backgate diode of the device provides another conductive channel. Another problem that occurs with modules operating under different power supply voltages is the potential for gate oxide breakdown when the lower-power module is powered down (i.e. power supply voltage is at 0 V). For instance, in a 3.3 V process, the maximum voltage allowed from the gate to the source, drain, in any device is 4.6 V. The maximum gate to backgate voltage is 5.3V. A 5.0 V signal appearing on a common bus when the 3.3 V module is powered down can create gate oxide voltages exceeding the 4.6 V level, leading to device failure. In U.S. Pat. No. 5,555,149, issued Sep. 10, 1996 to Wert et al., an output buffer is presented that prevents reverse charge leakage by using isolation transistors to block potential leakage paths. However, when the invention of Wert et al. is powered down, it provides no protection against gate oxide breakdown.
Accordingly, it is desirable to provide an output protection circuit that avoids reverse charge leakage while preventing excessive gate oxide voltage development when powered down.
SUMMARY OF THE INVENTION
The present invention provides an output driver that prevents reverse charge leakage to its power supply from a common bus shared with a higher-voltage module, and also ensures that voltages generated across its device gate oxides never exceed a specified breakdown voltage, even when the driver is powered down. An embodiment of the present invention includes output driver transistors to provide an output signal at an output terminal, buffering circuits to limit the voltage seen by output driver transistors in the circuit due to external voltages on the output terminal, and a reference voltage generator to provide buffer voltages to the circuit when powered down in order to prevent the specified breakdown voltage from appearing in the circuit. In an implementation of the present invention, the buffering circuits include buffering transistors in series between the output driver transistors and the output terminal, and the reference voltage generator includes a diode string in series with the output terminal to provide the reduced interim voltages from the external voltage. An embodiment of the present invention also includes protection circuits to apply the interim voltages to the driving and buffering transistors in order to keep the gate oxide voltages below the specified breakdown voltage. Another embodiment of the present invention includes a logic protection circuit to prevent the external voltage from being sent to a control logic circuit controlling the output driver.
The present invention will be better understood upon consideration of the accompanying drawings and the detailed description below.
REFERENCES:
patent: 6081412 (2000-06-01), Duncan et al.
Duncan Richard L.
Wert Joseph D.
Jackson Stephen W.
National Semiconductor Corporation
Skjerven Morrill LLP
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