Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – Mesa structure
Reexamination Certificate
2000-10-13
2002-02-26
Prenty, Mark V. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
Mesa structure
C257S625000, C257S655000
Reexamination Certificate
active
06351023
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a semiconductor device and methods of making the semiconductor device and, more particularly, to a thin P-N diode containing an ultra-sharp P-N junction.
2. Description of the Related Art
A conventional crosspoint magnetic tunnel junction magneto-resistive memory cell such as a nonvolatile magnetic random access memory (MRAM), as disclosed for example, in U.S. Pat. No. 5,640,343, commonly assigned with the present application and incorporated herein by reference, requires a diode in series with each magnetic tunnel junction (MTJ) memory element.
With this arrangement, a sense current flows through only one memory element instead of through N elements (where N is an integer greater than 1), as in conventional series architecture magneto-resistive memories. As a result, the signal-to-noise ratio is increased by a factor of N at the same sense power, or alternatively the sense power is decreased by N squared at equal signal-to-noise ratio. Moreover, high density very-large-scale-integrated (VLSI) magneto-resistive memory designs become possible.
However, the areal density of the crosspoint magnetic tunnel junction magneto-resistive memory cells can be increased if the diode is located on top of a metal conductor, as shown in FIGS. 1B, 1nC, and 9 of U.S. Pat. No. 5,640,343. The write current, which flows through this lower conductor is on the order of milli-Amperes, and should be close to the magnetic tunnel junction for good efficiency in generating the required magnetic field at the magnetic tunnel junction.
A diode on top of a conductor can be formed by crystalizing a deposited amorphous silicon layer. Such crystalized material has been used for silicon solar cells, but the conductivity of those diodes is lower than required for the crosspoint magnetic tunnel junction magneto-resistive memory cell. Further, since the sensing operation is a resistance measurement, any series resistance or low conductivity switch in series with the sense current path will detract from the signal being sensed. This is a problem.
Additionally, with the conventional structures, it has not been possible to simultaneously provide a high conductivity diode built on top of a metal conductor, and to minimize the contact resistance in series with the diode. Specifically, tradeoffs have been required since to optimize both objects requires thin and highly-doped silicon regions for very steep junctions which conflicts with the conventional processing of crystalized silicon (e.g., “polysilicon”).
SUMMARY OF THE INVENTION
In view of the foregoing and other problems of the conventional structures, an object of the present invention is to produce a high conductivity diode on top of a metal conductor, and to minimize the contact resistance in series with the diode.
Another object of the present invention is to produce grain sizes in the thin film polycrystalline silicon as large as the size of the diode used in deep submicron VLSI magneto-resistive memories.
In view of the foregoing, the present invention is directed to providing a thin P-N diode containing an ultra-sharp P-N junction, and methods of forming the ultra- sharp P-N junction.
In a first aspect of the present invention, the present invention provides a thin P-N diode, (e.g., preferably 0.1-1.0 microns thick), made in a thin film Si. The diode preferably includes a mesa (island) of polycrystalline Si located on (and contacting) a metal thin film wire, with a P-N junction preferably confined to a Si thickness of 0.01-0.1 microns.
In yet another aspect of the present invention, a method of manufacturing the confined P-N junction, with ultra-sharp profiles of both P and N dopants, is provided.
The diode of the present invention is distinguished by the following physical characteristics:
1. The diode is located on top of a metal address line (thin film wire), and has a low resistance electrical contact to the metal line;
2. The diode is formed in a “mesa” or island of semiconducting material, and the mesa or island has a thickness less than 1.0 micron;
3. The P-N junction is formed within a thin region of a semiconducting material, about 0.05 to 0.3 micron in thickness; and
4. The diode area is determined by the intersecting area of two (2), approximately perpendicular, metal lines, and is approximately equal to the square of the width of the metal lines (assuming the lines are equal in width). According to this method of defining the device area, a wide range of areas can be easily fabricated, including areas less than 1 micron
2
.
The diode of the present invention is unique among thin film diodes in that the following characteristics specify the electrical performance of the diode:
1. Very low resistance at each of the top and bottom contacts, less than about 100,000 Ohms, and preferably less than 25,000 Ohms at each contact;
2. A low differential resistance of the complete diode measured at 0.5 to 1 Volt, less than 50,000 Ohms and preferably less than 20,000 Ohms;
3. Forward current density, J
F
of more than 1 microAmpere per micro-meter
2
, at +1 nVolt; and
4. Reverse current density, J
R
of less than 10 picoAmpere per micro-meter
2
, at −1 Volt.
The present invention also includes process methods to fabricate a diode having the above characteristics.
An advantage of the method of the present invention is that cost of fabrication is reduced when either one or two slow and costly dopant implantation steps can be eliminated in favor of the use of either one or two in situ -doped Si layers, as in the processes of the present invention.
Further, an atomically smooth top surface on the finished polycrystalline Si (Poly-Si) mesa structure is easily obtained by using amorphous Si (a-Si) layers. The atomically smooth surface is required for subsequent formation of the magnetic tunnel junction layer, so a planarization step on the finished diode is eliminated.
Additionally, the amorphous Si (a-Si) layers can be grown conformally over 3-dimensional structures. Thus, the P-N diode can be located on the sidewall of a metal addressing line (or on the sidewall of a trench). This enables high areal density arrays of diodes to be easily made.
Further, the methods of the present invention utilize standard processing tools that are found in most semiconductor device factories, so that inexpensive manufacturing of the present invention is possible.
REFERENCES:
patent: 4653858 (1987-03-01), Szydlo et al.
patent: 4680085 (1987-07-01), Vijan et al.
patent: 4732873 (1988-03-01), Perbet et al.
patent: 4810637 (1989-03-01), Szydlo et al.
patent: 5008590 (1991-04-01), Huisman et al.
patent: 5151255 (1992-09-01), Fukuda et al.
patent: 5336641 (1994-08-01), Fair et al.
patent: 5405786 (1995-04-01), Kurtz
patent: 5424230 (1995-06-01), Wakai
patent: 5529937 (1996-06-01), Zhang et al.
patent: 5639689 (1997-06-01), Woo
patent: 5648662 (1997-07-01), Zhang et al.
patent: 5681759 (1997-10-01), Zhang
patent: 6180444 (2001-01-01), Gates et al.
Hong “Characterization of Ultra-Shallow P+-N Junction Diodes Fabricated by 500-Ev Boron-Ion Implantation”, IEEE, pp. 28-31, Jan, 1991.
Wu et al., “Characteristics of Polysilicon Contacted Shallow Junction Diode Formed with a Stacked-Amorphous-Silicon Film”, IEEE, pp. 1797-1804, Oct. 1993.
Wu et al., “High-Performance Polysilicon Contacted Shallow Junctions Formed by Stacked-Amorphous-Silicon Films”, IEEE, pp. 23-25, Jan 1992.
Gates Stephen McConnell
Scheuerlein Roy Edwin
August Casey P.
McGuireWoods LLP
Prenty Mark V.
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