Stepped gain controlled RF driver amplifier in CMOS

Details Stepped gain controlled RF driver amplifier in CMOS Stepped gain controlled RF driver amplifier in CMOS

2001-05-31

2002-06-04

Pascal, Robert (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including plural amplifier channels

C330S285000

Reexamination Certificate

active

06400227

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to semiconductor radio frequency (RF) amplifiers generally, and more specifically to variable gain RF driver amplifiers using CMOS in the gigahertz frequency range.
2. Description of the Related Art
Variable gain RF driver amplifiers find use in many applications. For example, to maintain the signal quality in a code division multiple access (CDMA) mobile transmitter it is necessary to maintain precise control of the transmitted power over a wide dynamic range. Typically, gain control is divided between two stages in the transmitter: the intermediate frequency (IF) variable gain amplifier and the RF driver amplifier.
Gain control in RF driver amplifiers has conventionally been implemented as a continuously variable gain control circuit, having an analog gain control signal input. For example, in one approach an FET can be used in its triode region as a voltage variable resistor. When such a voltage variable resistor is placed in a feedback loop, voltage variable gain results. This approach does allow variable gain, but over a limited range and with often poor linearity. Proper compensation of such a circuit is required for stability, which is problematic in the gigahertz frequency range. Typically Silicon or GaAs bipolar transistors are used, and are not easily integrated with digital CMOS technologies. Digital CMOS technologies are cost effective and increasingly dominant in digital communication devices.
Another conventional approach is to vary the bias voltage or current to the active components of the driver amplifier. This approach does not necessarily conserve power in the low bias state, and consequently does nothing to extend battery life in portable applications. This approach also has the additional disadvantage that the driver active components are not constantly biased in their most favorable region to reduce intermodulation and other distortion products. Thus, in certain gain regions the variable bias circuit will produce a low quality output, characterized by high distortion.
Both of the aforementioned methods of gain control also require a suitable analog gain control signal for control.
SUMMARY OF THE INVENTION
In view of the above problems, the present invention is an integrated circuit, MOSFET, variable gain amplifier suitable for operation in the gigahertz region and suitable for integration with or direct interfacing with digital CMOS gain control circuits.
The variable gain amplifier in accordance with the invention has at least two amplifier branches connected in parallel to drive a common output load. Each branch includes at least two FETs in a common source—common gate configuration referred to as a cascode. A first FET in each branch is arranged to receive an input signal and to amplify the signal in a common source configuration; the second FET is arranged in a common gate configuration with its source receiving the output current of the first FET. The gate of the second FET is coupled to a corresponding gain control input so that the second FET is enabled when the gate receives an enabling gain control signal and disabled otherwise.
In one embodiment, the variable gain amplifier has four branches in which corresponding FETs have widths which differ according to a predetermined ratio, suitably a 1:2:4:4 ratio. This invention anticipates both binary and non-binary weight combination of FET sizes. Preferably the first and second FETs in each branch are biased in a substantially saturation region of operation when the second FET is enabled by the gain control input. This maintains a low distortion figure throughout the dynamic range of the gain control.


REFERENCES:
patent: 5572166 (1996-11-01), Gilbert
patent: 5684431 (1997-11-01), Gilbert et al.
patent: 5920230 (1999-07-01), Beall
patent: 6064264 (2000-05-01), Tarsia et al.
patent: 6121842 (2000-09-01), Adlerstein et al.
patent: 6252463 (2001-06-01), Kobayashi
CDMA 3 V Transmitter If Subsystem with Integrated Voltage Regulator, Analog Devices, AD6122 (2000), pp. 1-20.

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