Method for manufacturing a semiconductor device,...

Radiation imagery chemistry: process – composition – or product th – Radiation modifying product or process of making – Radiation mask

Reexamination Certificate

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C430S313000, C430S394000

Reexamination Certificate

active

06482554

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device. The present invention relates also to a photolithography mask and a method for manufacturing the same. The methods and mask according to the present invention are suitable for efficient production of a plurality of wiring elements differing in depth.
2. Description of the Background Art
A semiconductor element contains a plurality of wiring elements, such as contact plug and interconnections, which vary in depth and pattern. According to the conventional method, they are formed individually by means of photolithography masks for respective patterns.
FIGS. 10A through 10E
are sectional views for describing the steps of such conventional manufacturing method. There are shown a semiconductor substrate
12
, an interlayer insulating film
14
, and a lower layer wiring
16
. According to the conventional method, the interlayer insulating film
14
is formed on the lower layer wiring
16
before a first photoresist film
18
is formed on the later, as shown in FIG.
10
A. The first photoresist film
18
is patterned by means of a first mask
20
as shown in
FIG. 11A
so as to be used to form a contact hole in the interlayer insulating film
14
. In
FIG. 11A
, those parts indicated by reference numerals
22
are etching object parts, i.e., the parts corresponding to contact holes.
Etching through the first photoresist film
18
as a mask forms a contact hole communicating with the lower layer wiring
16
, as shown in FIG.
10
B. The contact hole is filled with metal so that the contact plug
24
is formed.
As shown in
FIG. 10C
, the contact plug
24
is covered with an interlayer insulating film
14
, which is subsequently covered with a second photoresist film
26
. The second photoresist film
26
is patterned by means of a second mask
28
as shown in
FIG. 11B
so as to be used to form trenches for upper layer wiring on the interlayer insulating film
14
. In
FIG. 11B
, those parts indicated by reference numerals
30
are etching object parts, i.e., the parts corresponding to the trenches for upper layer wiring.
Etching through the second photoresist film
26
as a mask forms trenches
30
for upper layer wiring in the layer on the contact plug
24
, as shown in FIG.
10
D. The trenches
30
are filled with metal so that the upper layer wiring
34
communicating with the contact plug
24
is formed, as shown in FIG.
10
E.
As mentioned above, the conventional method is designed to form sequentially the contact plug and the upper layer wiring
34
, which differ in depth and pattern, by using separate photolithography masks. Therefore, the conventional method needs many steps to form these wiring elements.
In addition, the conventional method is designed to perform separately photolithography for the contact plug
24
and photolithography for the upper layer wiring
34
. The result is incomplete alignment with each other, which leads to electrical troubles (such as short-circuits, openings, and variation in resistance) in semiconductor devices.
SUMMARY OF THE INVENTION
The present invention has been conceived to solve the previously mentioned problems. It is a first object of the present invention to provide a method for manufacturing semiconductor devices capable of accurately forming in a simple manner a plurality of wiring elements differing in depth and pattern.
It is a second object of the present invention to provide a photolithography mask useful for accurately forming in a simple manner a plurality of wiring elements differing in depth and pattern.
It is a third object of the present invention to provide a method for producing such a photolithography mask.
The above objects of the present invention are achieved by a method for manufacturing a semiconductor device having a plurality of wiring elements differing in depth and pattern. In the method, a plurality of photoresist films differing in sensitivity are stacked on a prescribed film formed on a semiconductor substrate. The plurality of photoresist films are exposed in such a way that the respective parts where the plurality of wiring elements are formed are irradiated with exposure light with an intensity corresponding to the depth of the individual wiring element. The plurality of photo resist films are developed so as to pattern the individual photoresist films into a desired shape. The prescribed film is etched by using the plurality of photoresist films, which have been patterned, as a mask, thereby forming a space to accommodate the plurality of wiring elements. A metal material is embedded in the space so as to form the plurality of wiring elements.
The above objects of the present invention are also achieved by a photolithography mask used to form n kinds (n is an integer of 3 or above) of wiring elements differing in depth and pattern. The photolithography mask includes a substrate which transmits the exposure light. The photolithography mask also includes n layers of light-shielding films which are stacked on the substrate. Each of the n layers of light-shielding films has a high resistance to etching to remove the light-shielding film placed thereon and also is patterned to a desired shape.
The above objects of the present invention are achieved by a method for manufacturing a photolithography mask used to form n kinds (n is an integer of 3 or above) of wiring elements differing in depth and pattern. In the method, n layers of light-shielding films are stacking sequentially from the first layer to the nth layer on a substrate which transmits the exposure light. The n layers of light-shielding films are etched sequentially starting from the nth layer in such a way that the with layer (i is an integer of 1 to n) of light-shielding film assumes a shape corresponding to all of the i kinds of the wiring elements selected from the deeper side. Each of the nth layer of light-shielding film having a high resistance to etching to remove the light-shielding film placed thereon.
Other objects and further features of the present invention will be apparent from the following detailed description when read in conjunction with the accompanying drawings.


REFERENCES:
patent: 5753417 (1998-05-01), Ulrich
patent: 5906910 (1999-05-01), Nguyen et al.
patent: 6355399 (2002-03-01), Sajan et al.
patent: 9-246375 (1997-09-01), None
patent: 11-224898 (1999-08-01), None
patent: 11-289010 (1999-10-01), None

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