Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal
Reexamination Certificate
1997-06-19
2002-11-19
Diep, Nhon (Department: 2613)
Pulse or digital communications
Bandwidth reduction or expansion
Television or motion video signal
C375S240120, C348S700000
Reexamination Certificate
active
06483875
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a picture signal processing device for performing processing operations, such as synthesis, deformation or color conversion of picture signals.
2. Description of the Related Art
A picture signal processing device performs picture processing, such as synthesis or color conversion of pictures as it selects plural from plural input picture signals. For example, the picture information processing device synthesizes picture signals of two systems as it switches between the two systems using a switcher as switching means.
This picture signal processing device receives composite signals, as standard-format picture signals (shown as Composite in the drawings), Y/C signals and component signals (shown as Component in the drawings) via a switcher
141
, as shown in FIG.
1
. The picture signal processing device performs picture processing on the composite signals. Thus it becomes necessary to convert the Y/C signals and composite signals other than the component signals into component signals downstream of the switcher
141
.
First, the composite signals are separated by a Y/C separation circuit
142
into Y and C signals so as to be then converted by a decoder
143
into Y, R-Y and B-Y signals as component signals. The Y/C signals are converted by the decoder
143
into component signals. The component signals, outputted by the decoder
143
, are sent to an A/D converter
144
, which then converts the component signals into digital signals based on clocks of a write clock generator
145
. The digital component signals are sent to a frame synchronizer
146
.
The frame synchronizer
146
writes the digital component signals in an internal frame memory based on external clock signals (shown as EXT key in the drawings) generated from the above standard format picture signals and reads out the digital component signals therefrom to adjust the frame position or color subcarrier phase in order to adjust the signals for digital multi-effect (DME) processing as later explained. The digital component signals outputted by the frame synchronizer
146
are sent to a switcher
147
.
A Y/C separation circuit
148
, a decoder
149
, an A/D converter
150
, a write clock generator
151
and a frame synchronizer
152
perform processing similar to that described above on the standard format picture signals of the other system via switcher
141
. The digital component signals outputted by a frame
152
are also sent to the switcher
147
. The switcher
147
is fed with Y, R-Y and B-Y digital component signals from a test pattern signal generator
153
generating test pattern signals, such as color background signals, color bar signals or grid signals.
The digital component signals via switcher
147
are sent to a two-dimensional variable low-pass filter (LPF)
154
. This two-dimensional variable LPF
154
removes high-frequency components of the digital component signals for generating no aliasing in the digital component signals. The digital component signals, freed of the high-frequency components, are sent to a field memory
155
, which is also fed with write and readout addresses from a system controller
157
via a DME processor
158
. In keeping with instructions from the system controller
157
, the DME processor
158
performs picture processing, such as picture synthesis, color conversion or geometry conversion, on the digital component signals. To this end, the system controller
157
sends data required for desired DME processing to the DME processor
158
.
The DME processor
158
performs the above picture signal processing on the digital component signals from the two-dimensional LPF
154
, using the field memory
155
, in accordance with the addresses and data supplied from the system controller
157
.
If the digital component signals are processed by deformation, pixel dropout frequently occurs in the signals read out from the field memory
155
. Thus, the signals read out from the field memory
155
are sent to an interpolation circuit
156
for pre-set interpolation. The DME processed signals, outputted from the interpolation circuit
156
, are sent to a data mixing circuit
156
, which is also fed from the system controller
157
with the addresses same as those sent to the DME processing circuit
158
, so that the addresses and data are mixed with the DME processed signals. Mixed output signals of the data mixing circuit
159
are sent to a synthesis circuit
161
, which is also fed with the digital component signals delayed by a field delay circuit
160
. Thus, these delayed digital component signals are mixed with the mixed output signals. A synthesized output of the synthesis circuit
161
is a signal processed by picture signal processing. The synthesized output is converted by the D/A converter
162
into analog signals which are outputted in the form of analog composite signals, Y/C signals and component signals.
Meanwhile, with the picture signal processing device shown in
FIG. 1
, the input/output signals are limited to the standard composite signals, Y/C signals and component signals. That is, the device cannot handle picture signals deviating from standard picture signals, such as pictures of different resolution, pictures with different transfer rates or with different picture size. Moreover, the same picture signals with different systems, such as HDTV or NTSC systems, cannot be handled in the same device. That is, the picture signal processing device cannot handle so-called free-format picture signals which are not dependent on resolution, so-called scalable-format picture signals or picture signals with different systems. As a matter of fact, the compressed pictures cannot be handled, so that switching of compressed pictures resulting from inter-frame compression cannot be switched smoothly.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a picture signal processing device whereby so-called free-format picture signals which are not dependent on resolution, so-called scalable-format picture signals or picture signals with different systems can be processed with various picture processing and whereby switching of compressed pictures resulting from inter-frame compression cannot be switched smoothly.
It is another object of the present invention to provide a picture signal processing device whereby first compressed picture signals and second compressed picture signals, compressed by intra-frame compression and inter-frame compression, respectively, can be switched at desired positions and outputted.
In one aspect, the present invention provides a picture signal processing apparatus including selection means for selectively seizing a plurality of compressed pictures obtained in inter-frame compression, converting inter-frame forward predictively-coded pictures into intra-frame coded pictures, in terms of a pre-set number of frames as a unit, and modifying prediction data of bidirectional predictive-coded pictures, expansion means for expanding compressed picture signals selected by the selection means, first input/output means for inputting/outputting picture signals outputted by the expansion means, picture processing means for performing various picture processing operations on picture signals outputted by the first input/output means for outputting processed picture signals, compression means for compressing the processed picture signals outputted by the picture processing means for outputting compressed processed picture signals, second input/output means for inputting/outputting the compressed picture signals outputted by the expansion means, and control means for controlling the selecting operation by the selection means, expansion processing by the expansion means, input/output processing by the first input/output means, picture processing by the picture processing means, compression by the compression means and input/output processing by the second input/output means.
Preferably, the selection means includes means for suppressing increase in the inf
Ebihara Norio
Hasebe Atsushi
Yoneya Satoshi
Diep Nhon
Frommer William S.
Frommer & Lawrence & Haug LLP
Philippe Gims
Sony Corporation
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