Liquid crystal display apparatus

Liquid crystal cells – elements and systems – Particular structure – Having significant detail of cell structure only

Reexamination Certificate

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C349S042000, C349S043000

Reexamination Certificate

active

06404477

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a liquid crystal display apparatus, in particular to an active matrix type liquid crystal display apparatus in which switching elements are arranged in a matrix form on a substrate.
2. Description of the Related Art
Conventionally, a liquid crystal display apparatus using a nematic liquid crystal is widely used for segment type liquid PC; crystal display apparatuses such as watches or calculators. Recently, taking advantages of its reduced size in thickness, light weight and low power consumption, the liquid crystal display apparatus is widely used for any kind of display device of word processors, computers, navigation systems or the like. In particular an active matrix type liquid crystal display apparatus has been widely used, in which an active element such as a thin film transistor (hereinafter referred to as TFT) is used as a switching element and pixels are arranged in a matrix form.
A liquid crystal display apparatus, in comparison with CRT (cathode ray tube) conventionally used as a display, has advantages of remarkably reduced thickness (depth), low power consumption and ease of full color display, and is in increasing demand in a variety of fields including personal computers, monitors, mobile televisions and camera display devices.
FIG. 16
is a view showing a schematic structure of a conventional active matrix type liquid crystal display apparatus. The liquid crystal display apparatus is transparent type and has a light-transmitting active matrix substrate on which a plurality of pixel electrodes
101
for applying a voltage to a liquid crystal layer are formed in a matrix form. As a switching element for selectively driving pixel electrodes
101
, a TFT
102
is formed on the active matrix substrate, whose drain terminal is connected to a pixel electrode
101
. Furthermore, in order to display in color, on the active matrix substrate or on a counter substrate are provided color filter layers such as red, green and blue.
To a gate terminals of the TFT
102
is connected a scanning line
103
. In addition, a gradation signal line
104
is connected to a source terminal. The scanning line
103
and the gradation signal line
104
are arranged so as to pass the periphery of the pixel electrode
101
and intersect at right angles each other. When a signal is inputted via the scanning line
103
,to the gate terminal, the TFT
102
is driven and controlled. When an input signal is inputted to obtain continuity between the source terminal and the drain terminal, a data signal supplied via a gradation signal line
104
is inputted as a display signal to the pixel electrode
101
.
To the drain terminal of the TFT
102
is connected one terminal of an additive capacitance
105
in conjunction with pixel electrodes
101
. The other terminal of the additive capacitance
105
is connected to a common signal line
106
and the additive capacitance
105
plays a role for keeping a voltage applied to a liquid crystal layer. Since the capacitance of the additive capacitance
105
Cs causes a signal delay, in order to reduce the signal delay a connecting line
107
for connecting common signal lines
106
can be provided. The inventors of the invention disclose the connecting line
107
which connects the common signal lines
106
in Japanese Unexamined Patent Publication JP-A 3-72321 (1991).
In Japanese Unexamined Patent Publication JP-A 3-72321 (1991), common main wirings for electrically connecting between storage capacitance (Cs) bus lines are provided at both ends of the Cs bus lines, whereby the signal delay is reduced and high image quality can be obtained.
In the active matrix type liquid crystal display apparatus, a liquid crystal layer having a thickness of 4.3 to 4.5 &mgr;m in general is sandwiched between an active matrix substrate and an opposite counter substrate to form a liquid crystal capacitance
108
. The additive capacitance
105
is connected to the liquid crystal capacitance
108
in parallel. However, the conventional structure as shown in
FIG. 16
has problems such as increasing possibility of occurrence of failure, decreasing yield and increasing manufacturing costs because there is a intersection part between the scanning line
103
and the gradation signal line
104
. Furthermore, with the conventional structure a capacitance is formed in the intersection part of signal lines via an insulating film, and a signal delay such as a common signal delay occurs, which may reduce display quality of a liquid crystal display apparatus.
FIG. 17
is a view showing a schematic configuration of a liquid crystal display apparatus having a counter source structure which is proposed in U.S. Pat. No. 4,694,287. Since in this structure on the TFT substrate side there is no intersection part of signal lines, a leak between signal lines hardly occurs and since intersection parts are -not on the same substrate, a capacitance added to signal lines can be reduced. In the case of the counter source structure, on the pixel substrate on which pixel electrodes are formed, scanning lines and gradation signal lines, which are formed on the different substrate, do not intersect, whereby reduction of the probability of occurrence of line failure, enhancement of yield and reduction of manufacturing costs can be realized. In addition, in the case of the counter source structure, there is no intersection of signal lines on the same substrate, therefore no capacitance is formed in the intersection part. Accordingly, in comparison with the conventional structure as shown in
FIG. 16
, the capacitance added to signal lines and the signal delay can be reduced.
In the counter source structure as shown in
FIG. 17
, on the pixel substrate
110
are arranged switching elements
111
with three terminals such as amorphous silicon semiconductors are arranged in a matrix form to form an active matrix. The switching element
111
is, for example, a TFT, to a gate terminal of which is connected a scanning line
112
for each of columns of switching element, and to a source terminal of which is connected a reference signal line
113
for each of the columns of switching elements, and to a drain terminals of which is connected a pixel electrode
114
. On a counter substrate
115
opposite to a pixel substrate are arranged a plurality of gradation signal lines
116
in a direction orthogonal to the scanning line
112
. The gradation signal line
116
also serves as a counter electrode in an opposite part to the pixel electrodes
114
.
The liquid crystal display apparatus, taking advantages of reduced thickness, light weight and low power consumption, is widely used for any kind of display devices such as televisions, computers and navigation systems. Demand for upsizing of display and high resolution of panels is increasing through the years. In order to achieve an upsized high resolution panel, it is necessary to solve a problem of signal delay, which is one of the biggest problems to be solved. With the upsizing of the panel, the signal line will be longer and the resistance value of the signal line and the capacitance value added to the signal line will increase. Since the extent of signal delay is proportional to the product of resistance value and capacitance value, upsizing of panels involving increases of both the resistance value and the capacitance value, causes a greater signal delay. As a result, within writing time a desired voltage can not be applied to a part of liquid crystal, which causes degradation in display quality, so-called shadowing.
Similarly, in enhancing the resolution, the signal writing time is also reduced and an effect of signal delay will appear strongly. Consequently, the same as in the case of upsizing the panel, degradation in display quality will occur.
Moreover, in the case of upsizing the display panel and enhancing the resolution, the following is unavoidable:
1) the resistance value of the signal line is increased;
2) the capacitance added to the signal line is increased; and
3)

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