Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – With rotor
Reexamination Certificate
2001-11-05
2002-11-05
Nguyen, Vinh P. (Department: 2829)
Electricity: measuring and testing
Measuring, testing, or sensing electricity, per se
With rotor
C324S073100
Reexamination Certificate
active
06476598
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to removal of ringing in the input unit of a pin electronics card used in semiconductor testing apparatus, output stage circuit inside the IC or LSI, or output unit of a device under test board (DUT board) used in semiconductor testing apparatus, and more particularly to a ringing preventive circuit for removing noise such as ringing from a transmission path in which an electric signal is transmitted.
2. Description of the Background Art
FIG. 25
is a conceptual diagram showing the connected state of the DUT board mounting a semiconductor device such as IC and LSI, and the input unit of a pin electronics card of a semiconductor testing apparatus, for testing a semiconductor apparatus such as IC and LSI. In
FIG. 25
, reference numeral
1
denotes an objective device to be tested such as IC and LSI,
2
is a DUT board for mounting the objective device
1
,
3
is a holder such as socket and prober fixed on the DUT board
2
for holding and electrically connecting the objective device
1
,
4
is a transmission path for transmitting an electric signal outputted from the output unit of the objective device
1
, being connected to the objective device
1
in the holder
3
,
5
is a connector connected to the transmission path
4
provided at the DUT board
2
side,
6
is a semiconductor testing apparatus for testing the objective device
1
,
7
is a pin electronics card provided in the semiconductor testing apparatus
6
and including a comparator or the like, and
8
is a connector provided in a pin electronics card
7
to be connected to the connector
5
of the DUT board
2
.
The pin electronics card
7
of the semiconductor testing apparatus
6
is an input and output interface with the objective device
1
, and has a significant influence on the test performance.
FIG. 26
is a circuit diagram showing the outline of the structure of the pin electronics card
7
of the semiconductor testing apparatus shown in FIG.
25
. In
FIG. 26
, reference numeral K
1
is a relay having one end connected to the connector
8
for making or breaking a connection between the one end and the other end in response to a control signal,
11
is a pin electronics comparator having an input terminal
11
a
connected to the other end of the relay K
1
, a terminal connected to a power source E
5
to be provided with a reference voltage V
Hth
, a terminal connected to a power source E
6
to be provided with a reference voltage V
Lth
, and an output terminal
11
b
for outputting the result of comparison of the voltage at the input terminal
11
a
with the reference voltages V
Hth
, V
Lth
,
12
is a pin electronics driver having an input terminal
12
a
for receiving a signal to be given to the objective device for testing, and an output terminal
12
b
connected to the other end of the relay K
1
, and
13
is a pin electronics control circuit for processing the signal to be given to the objective device from the semiconductor testing apparatus to give to the input terminal
12
a
of the pin electronics driver
12
, processing the signal outputted from the output terminal
11
b
of the pin electronics comparator
11
to be taken into the semiconductor testing apparatus, and controlling to open or close the relay K
1
. Herein, it is supposed that reference voltage V
Hth
>reference voltage V
Lth
.
The operation of the conventional semiconductor testing apparatus shown in
FIG. 25
and
FIG. 26
is described below. In particular, processing of the signal to be outputted from the objective device
1
is explained. In the pin electronics card
7
, in order to process an input signal, the relay K
1
is in ON (closed) state, so that the pin electronics comparator
11
may be connected between the connector
8
and pin electronics control circuit
13
. The voltage V
CO
at the output terminal
11
b
of the pin electronics comparator
11
is, supposing the voltage at the input terminal
11
a
of the pin electronics comparator
11
to be V
Ci
, V
CO
=V
CL
when V
Ci
>V
Hth
, V
CO
=V
CL
when V
Ci
<V
Lth
and V
CO
=V
CH
when V
Lth
<V
Ci
<V
Hth
, where voltage V
CL
is the lower side logic level in the pin electronic control circuit
13
, and voltage V
CH
is the higher side logic level in the pin electronics control circuit
13
.
FIG. 27
is a waveform diagram showing the signal processed by the pin electronics card and the processing result in the pin electronics comparator. The waveform shown in (a) of
FIG. 27
is a voltage waveform of an ideal electric signal suited to processing of the pin electronics comparator
11
. Ideally, from the output circuit of the objective device
1
shown in
FIG. 25
, a signal having a waveform as shown in (a) of
FIG. 27
is outputted, and passes through the transmission path
4
, and a signal having the waveform shown in (a) of
FIG. 27
is put into the connector
8
of the pin electronics card
7
in the semiconductor testing apparatus
6
. From the connector
8
which is the input and output terminal of the pin electronics card, an ideal signal Vi is put in, and it is supplied into the pin electronics comparator
11
through the relay K
1
. Therefore, the voltage V
Ci
at the input terminal
11
a
of the pin electronics comparator is ideally a signal Vi having the waveform shown in (a) of FIG.
27
. At this time, the output impedance of the pin electronics driver
12
is supposed to be in high impedance state (hereinafter called Hi-Z state). Hence, ideally, the voltage waveform generated at the output terminal
11
b
by the action of the pin electronics comparator
11
is as shown in (b) of FIG.
27
.
Actually, however, in the process of the waveform passing through the transmission path
4
and others, the signal having the voltage waveform as shown in
FIG. 28
mixed with ringing and other noise due to inductance component and capacitance component of the transmission path
4
, impedance mismatching of the transmission path
4
, incoming noise mixed in the transmission path
4
and others is put into the pin electronics comparator
11
.
FIG. 28
is a waveform diagram showing the signal processed in the pin electronics card and the processing result in the pin electronics comparator. When a signal having the waveform as shown in (a) of
FIG. 28
is put into the pin electronics comparator
11
, the pin electronics comparator
11
may sometimes malfunction. When the waveform shown in (a) of
FIG. 28
is put into the pin electronics comparator
11
, malfunction occurs in the portion crossing the voltage V
Lth
in shaded region B in (a) of
FIG. 28
, and in the portion crossing the voltage V
Lth
in shaded region D. When the signal having the waveform shown in (a) of
FIG. 28
is put into the pin electronics comparator
11
, the waveform appearing at the output terminal
11
b
of the pin electronics comparator
11
is as shown in (b) of FIG.
28
. Shaded region E in (b) of
FIG. 28
is the malfunctioning portion.
The pin electronics card is an interface between the objective device
1
and semiconductor testing apparatus
6
, and the information indicated by the signal outputted from the objective device
1
must be accurately communicated to the semiconductor testing apparatus
6
, but this object may not be achieved if malfunction occurs in the pin electronics comparator
11
.
Incidentally, transmission of pulse signal or processing is not limited to the semiconductor testing apparatus alone, but such scene is often encountered in general semiconductor devices.
FIG. 29
is a conceptual diagram showing part of the constitution of a general semiconductor device. In
FIG. 29
, reference numeral
14
is a semiconductor device,
15
is an output pin of the semiconductor device
14
,
16
is an output buffer connected to the output pin
15
for giving an output signal to the output pin
15
,
17
is a transmission path connected to the output buffer
16
, and
18
is a circuit before an output stage for generating a circuit to be transmitted through the trans
Mitsubishi Denki & Kabushiki Kaisha
Nguyen Vinh P.
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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