Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Wire contact – lead – or bond
Reexamination Certificate
2000-07-10
2002-08-13
Flynn, Nathan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Wire contact, lead, or bond
C257S783000, C257S786000, C257S691000, C257S696000, C257S698000
Reexamination Certificate
active
06433441
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
The present invention relates to a high speed area array type semiconductor device.
2. Description of the Prior Art
Recently, a signal speed of a semiconductor device has been increasing. The signal speed is limited, due to wave form deformation of signal in the semiconductor device.
In a double sided wiring board, a signal wiring is formed on one side, while a ground plane is formed on the other side to increase its ground conductive area, thereby matching characteristic impedance in order to suppress the deformation of the high speed signal waveform. The double sided wiring board can operate in higher frequency range than the single sided wiring board. Inversely, saying, the single sided wiring board has a disadvantage that the high speed operation is inferior to the double sided wiring board, because the ground plane cannot be formed.
However, manufacturing the double sided wiring board is costly, compared with the single side wiring board, particularly, the double sided wiring board with a film substrate of TAB (tape automated bonding) tape.
FIGS. 6A and 6B
show a conventional area array type semiconductor (TBGA (tape BGA) having single side wiring) employing TAB (tape automated bonding), BGA (ball grid array) and single side wiring.
Generally, the number of ground pads of a semiconductor chip
1
is suppressed to a lower limit in order to maintain manufacturing efficiency. In the conventional area array type semiconductor device shown in
FIG. 6A
, the number of the ground pads is also suppressed to a lower limit and minimum ground wiring is formed on a substrate. As a result, more signal pads and signal wires are provided than the other types.
As shown in
FIG. 6B
, in the conventional area array type semiconductor device, the signal pads (S pads), ground pads (G pads) and power pads (P pads) are arrayed on each side of the semiconductor chip
1
. Because the number of the S pads is larger than the other pads, there are many places where the S pads adjoin each other. In the conventional area array type semiconductor device, there are vacant pads R, for example, two vacant pads, as shown in FIG.
6
B. Therefore, the S pads adjoin across the vacant pad at a position, while other S pads adjoin each other directly at other position. Further, signal wires (S leads) leading from the S pads run in parallel.
In the configuration as shown in
FIG. 6B
, the signal waveforms are easily deformed, because two signal waves run in parallel. On the contrary, the signal waveform is stabilized if the ground wires (G leads) which are the routes through which the signal waves return through a load are arranged in parallel to each other.
SUMMARY OF THE INVENTION
Therefore, an object of the invention is to provide an area array type semiconductor device employing a single side wiring board which can be produced at a low cost and in which the signal waveform is not likely to be deformed, even if high speed signal is applied.
According to a first aspect of the present invention to solve the above problem, there is provided an area array type semiconductor device, wherein a semiconductor chip having signal pads, ground pads and power pads are mounted on a substrate, wires leading from each of the pads are placed on a single side of the substrate and external connecting terminals are placed on the wires, the number of the ground pads being larger than the number of ground external terminals.
The signal pad, ground pad and power pad mentioned in this specification mean signal electrode pad, ground electrode pad, and power electrode pad of a semiconductor chip respectively. The signal wire means a wire leading from the signal pad of the semiconductor chip on a substrate. The ground wire means a wire leading from the ground pad of the semiconductor on the substrate. The power wire means a wire leading from the power pad of the semiconductor on the substrate. The signal external terminals means an external terminal of the area array type semiconductor device connected to the signal wire. The ground external terminal means an external terminal of the ground wire and the power external terminal means an external terminal of the power wire.
According to the area array type semiconductor device of the first aspect, because the number of the ground pads is larger than the number of the ground external terminals, additional ground pads can be placed between two signal pads adjacent on a semiconductor chip conventionally. As a result, the number of adjacent signal pads, further adjacent signal wires can be reduced. Instead, the number of the signal pads adjacent to the ground pad, further signal wires adjacent to the ground wire can be increased, so that a loop circuit (composed of the signal pad and ground pad) which may cause noise can be reduced in size. Consequently, even if a higher frequency signal is applied, the signal waveform is not likely to be disturbed and the signal waveform is stabilized. Thus, there is such an advantage that performance of correspondence to high speed signal is improved with respect to the prior art.
According to the first aspect of the present invention, more ground pads are provided than the number of the ground external terminals. Consequently, the ground pads do not correspond to the ground external terminals one to one and thus, at least one or more of the ground external terminals are shared by wires leading from plural ground pads.
According to a second aspect of the present invention, there is provided an area array type semiconductor device, wherein a semiconductor chip having signal pads, ground pads and power pads are mounted on a substrate, wires leading from each of the pads are placed on a single side of the substrate and external connecting terminals are placed on the wires, the ground wire being formed in a larger width than the other wires and gaps between the ground wires and the signal wires being substantially equal.
Thus, according to the area array type semiconductor device of the second aspect, the gap between the ground wire and the signal wire is substantially equal, so that characteristic impedance matching is always secured from the signal pad to the signal external terminal. Consequently, even if a higher frequency signal is applied, the signal waveform is not likely to be disturbed but stabilized. Thus, there is such an effect that the performance of correspondence to high speed signal is improved with respect to the conventional art.
Although the gap between the ground wire and the signal wire is preferred to be always constant on respective parts of the substrate to ensure such an effect, even if the gaps cannot be made completely constant, that effect can be secured.
It is preferred that the ground wire is formed in a larger width than the other wires (signal wire, power wire) so as to secure as large area as possible. Although in such a case, the gap between the ground wire and the signal wire narrows, it is preferable that the gap is at least about 20 &mgr;m from viewpoint of insulation reliability.
Further, by making the ground wires short-circuit between each other, it is possible to select a path for current to flow to the ground external terminal freely. As a result, current flows into a ground wire adjacent to a signal wire to which the current flows, thereby minimizing magnetic field. A feature of the third aspect of the present invention is that the ground wires short-circuit between each other in the area array type semiconductor device of either the first or second aspect of the present invention.
Further, the ground wires are expanded around the power wires so as to maintain the gap with respect to the signal wire constant and secure characteristic impedance matching.
According to a fourth aspect of the present invention, there is provided an area array type semiconductor device according to the first-third aspects, wherein the ground wires are placed in a plane shape in a region excluding the signal wires, power wires and surrounding thereof on the substrate.
Here,
Nakajima Hirofumi
Niwa Kouichirou
Flynn Nathan
Mondt Johannes P
Young & Thompson
LandOfFree
Area array type semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Area array type semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Area array type semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2939180