Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2000-06-07
2002-11-19
Chaudhuri, Olik (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
Reexamination Certificate
active
06483192
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, it relates to a semiconductor device and a method of manufacturing the same capable of attaining high integration and refinement.
2. Description of the Prior Art
In a semiconductor device, the width of and the distance between wires are reduced in order to attain high integration and refinement. An exemplary conventional method of manufacturing a semiconductor device is now described.
As shown in
FIG. 16
, a silicon oxide film
102
, for example, is formed on a silicon substrate
101
by CVD or the like. A wire
103
of a doped polysilicon film, for example, is formed on the silicon oxide film
102
. Another silicon oxide film
104
, for example, is formed on the silicon oxide film
102
by CVD or the like to cover the wire
103
.
A prescribed photoresist pattern (not shown) is formed on the silicon oxide film
104
. Anisotropic etching is performed on the silicon oxide films
104
and
102
through the photoresist pattern serving as a mask, thereby forming a contact hole
105
exposing the surface of the silicon substrate
101
. A doped polysilicon film, for example, is formed on the silicon oxide film
104
to fill up the contact hole
105
. Prescribed photolithography and working are performed on the doped polysilicon film, thereby forming a pad
106
.
A silicon oxide film
107
, for example, is formed on the silicon oxide film
104
by CVD or the like to cover the pad
106
. A prescribed photoresist pattern (not shown) is formed on the silicon oxide film
107
. Anisotropic etching is performed on the silicon oxide film
107
through the photoresist pattern serving as a mask, thereby forming a contact hole
108
exposing the surface of the pad
106
.
As shown in
FIG. 17
, a doped polysilicon film, for example, is formed on the silicon oxide film
107
by CVD or the like to fill up the contact hole
108
. Prescribed photolithography and working are performed on the doped polysilicon film, thereby forming a conductive layer
109
. Thus, a semiconductor device including the pad
106
and-the conductive layer
109
electrically connected with the pad
106
is formed.
However, the semiconductor device formed by the aforementioned method of manufacturing a semiconductor device has the following problems: When manufacturing the semiconductor device, the finished dimensions of the wire
103
, the pad
106
etc. and the finished opening dimension of the contact hole
108
may be dispersed. Further, the photolithography steps may result in misalignment.
Particularly in the step of forming the contact hole
108
shown in
FIG. 16
, the contact hole
108
is so formed as to expose the surface of the pad
106
on the overall bottom surface of the contact hole
108
, in order to reliably electrically connect the conductive layer
109
with the wire
103
.
When the dimensions of the wire
103
, the pad
106
etc. are sufficiently larger than the widths of dimensional dispersion, the contact hole
108
can be formed with allowance for the aforementioned dispersion in manufacturing.
However, the semiconductor device is required to reduce the dimensions of the pad
106
, the wire
103
etc., the opening diameter of the contact hole
108
and the like in order to attain refinement and high integration. In the semiconductor device, further, the pad
106
and the wire
103
must be closer to each other.
In this case, the dimensions of the aforementioned parts are insufficient for the widths of dimensional dispersion, and a contact hole
108
a
is supposably formed as shown in
FIG. 18
due to such dimensional dispersion or misalignment.
In other words, the contact hole
108
a
may be so formed as to expose the surface of the pad
106
not entirely but partially on the bottom surface thereof. In such a contact hole
108
a
, the surface of the wire
103
close to the conductive layer
109
may disadvantageously be exposed.
When the conductive layer
109
is formed in such a contact hole
108
a
, the pad
106
and the wire
103
are supposably electrically shorted through the conductive layer
109
, as shown in FIG.
19
. Thus, it is supposed that the dimensions of the respective parts cannot be readily reduced but refinement and high integration of the semiconductor device are hindered.
SUMMARY OF THE INVENTION
The present invention has been proposed in order to solve the aforementioned supposable problems, and an object thereof is to provide a semiconductor device readily attaining refinement and high integration by preventing electrical shorting, while another object is to provide a method of manufacturing such a semiconductor device.
A semiconductor device according to an aspect of the present invention comprises a first conductive region, a second conductive region, a first insulating film, a contact hole, a second insulating film and a third conductive region. The first conductive region is formed on the main surface of a semiconductor substrate. The second conductive region is formed on the main surface of the semiconductor substrate in proximity to the first conductive region and has an upper surface on a higher position than the upper surface of the first conductive region. The first insulating film is formed on the main surface of the semiconductor substrate to fill up the first conductive region and the second conductive region. The contact hole is formed in the first insulating film and exposes the surface of the second conductive region. The second insulating film is formed to cover the side surface and the bottom surface of the contact hole except the exposed surface of the second conductive region. The third conductive region is formed on the first insulating film including a part located in the contact hole and electrically connected with the second conductive region.
According to this structure, the second insulating film covers the side surface and the bottom surface of the contact hole except the exposed surface of the second conductive region. Thus, the second conductive region can be prevented from being electrically shorted to parts other than the third conductive region also when the dimensions of the conductive regions or the opening dimension of the contact hole is reduced. Consequently, the semiconductor device can readily attain refinement and high integration.
In particular, the second insulating film can prevent the second conductive region and the first conductive region from being electrically shorted through the third conductive region by insulating the third conductive region and the first conductive region from each other when the contact hole is formed to two-dimensionally overlap with the first conductive region and the second conductive region by misalignment.
When the contact hole is formed to two-dimensionally overlap with the first conductive region and the second conductive region, the second conductive region and the first conductive region can be prevented from being electrically shorted through the third conductive region since a part of the contact hole located downward beyond the upper surface of the second conductive region is filled up with at least the second insulating film.
When the contact hole is two-dimensionally further shifted toward the position of the first conductive region, it follows that the second insulating film and the third conductive region fill up the part of the contact hole located downward beyond the upper surface of the second conductive region. Also in this case, the second insulating film interposed between the third conductive region and the first conductive region can prevent the second conductive region and the first conductive region from being electrically shorted.
The semiconductor device preferably has a plurality of first conductive regions so that the first conductive regions are covered with a third insulating film, different in etching property from the first insulating film, formed between the first insulating film and the first conductive
Chaudhuri Olik
McDermott & Will & Emery
Mitsubishi Denki Kabushiki Kiahsa
Trinh (Vikki) Hoa B.
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