Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
2000-06-08
2002-12-17
Chin, Wellington (Department: 2664)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S220000
Reexamination Certificate
active
06496507
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a system switching control device and a system switching control method for executing system switching operation between two systems (operating system and standby system), in which one cell storage device is selected as an operating system cell storage device from two cell storage devices of the two systems and cells are selectively supplied to the operating system cell storage device.
DESCRIPTION OF THE PRIOR ART
A system switching control device is used in an apparatus having two systems to be alternately employed as an “operating system” and a “standby system”.
FIG. 1
is a schematic block diagram showing an example of a conventional system switching control device. The conventional system switching control device of
FIG. 1
is composed of a switch section
101
and a cell circuit section
108
which is connected to the switch section
101
. The switch section
101
includes a switching section
103
, two cell storage sections
104
, a system control section
105
and a timer section
106
.
The switching section
103
selectively supplies inputted cells to one of the cell storage sections
104
. The cell storage section
104
that receives the cells from the switching section
103
is regarded as an operating system cell storage section
104
, and the other cell storage section
104
that does not receive the cells from the switching section
103
is regarded as a standby system cell storage section
104
. In short, the switching section
103
executes system switching operation between two systems (operating system and standby system). The cell storage section
104
temporarily stores the cells supplied from the switching section
103
in its buffer. The buffer operates as a FIFO (First-In First-Out) memory having enough capacity, in which the received cells are stored in order of reception and the stored cells are read out in order of the storage. The system control section
105
executes cell read control to the operating/standby system cell storage sections
104
when the system switching operation is conducted.
The cell circuit section
108
packs the cells supplied from the cell storage section
104
in appropriate frames and transmits the frames. The timer section
106
is a timer to which a system switching protection time T(s) is set. In the system switching operation, the timer section
106
starts counting when a count start instruction is supplied from the system control section
105
. When the count reached the system switching protection time T(s), the timer section
106
informs the system control section
105
of the elapse of the system switching protection time T(s) and resets the count to “0”.
FIG. 2
is a schematic block diagram showing an example of the composition of the cell storage section
104
of the conventional system switching control device of FIG.
1
. The cell storage section
104
shown in
FIG. 2
includes a cell reception section
109
, a cell write section
110
, a buffer
111
and a cell output section
112
.
When the cell reception section
109
received a cell from the switching section
103
, the cell reception section
109
sends a first cell reception signal (indicating that a cell to be written in the buffer
111
has been reached) to the cell write section
110
. The cell write section
110
which received the first cell reception signal from the cell reception section
109
executes cell write control to the buffer
111
. The buffer
111
is a FIFO memory which stores cells in order of reception and outputs the cells in order of the storage. The system control section
105
executes cell read control to the buffer
111
. The cell output section
112
receives the cells read out from the buffer
111
and sends the cells to the cell circuit section
108
in order of reception.
FIG. 3
is a schematic block diagram showing an example of the composition of the cell circuit section
108
of the conventional system switching control device of FIG.
1
. The cell circuit section
108
shown in
FIG. 3
includes a circuit cell reception section
113
, a circuit cell write/read section
114
, a circuit buffer
115
and a circuit section
116
.
When the circuit cell reception section
113
received a cell from the cell storage section
104
, the circuit cell reception section
113
sends a second cell reception signal (indicating that a cell to be written in the circuit buffer
115
has been reached) to the circuit cell write/read section
114
. The circuit buffer
115
is a small-size FIFO (First-In First-Out) memory which is provided to the cell circuit section
108
in order to absorb a delay of cells due to cell-packing operation by the circuit section
116
. The circuit cell write/read section
114
which received the second cell reception signal from the circuit cell reception section
113
executes cell write control of the circuit buffer
115
, in which the received cells are written in the circuit buffer
115
in order of reception. The circuit cell write/read section
114
also executes cell read control of the circuit buffer
115
, in which the cells stored in the circuit buffer
115
are read out in order of the writing.
The circuit buffer
115
has a threshold cell storage capacity. When the amount of the cells stored in the circuit buffer
115
reached the threshold cell storage capacity, the cell circuit section
108
sends a cell threshold signal to the system control section
105
. The system control section
105
which received the cell threshold signal suspends the cell reading from the operating system cell storage section
104
, thereby loss of cells at the circuit buffer
115
can be avoided. The circuit section
116
receives the cells read out from the circuit buffer
115
, packs the cells in appropriate frames, and transmits the frames.
In the following, the operation of the conventional system switching control device of
FIGS. 1 through 3
will be described more in detail. The inputted cells flow through the switching section
103
, the operating system cell storage section
104
and the cell circuit section
108
. In the ordinary cell transfer state, the system switching operation for switching between the operating system and the standby system is executed. In the system switching operation, the switching section
103
stops the supply of cells to the present standby system cell storage section
104
(former operating system cell storage section
104
) and starts the supply of cells to the present operating system cell storage section
104
(former standby system cell storage section
104
).
When the system switching occurred, the system control section
105
suspends the cell reading from the present operating system cell storage section
104
for a system switching time U(s). Therefore, in the present operating system cell storage section
104
, cell writing to the buffer
111
is executed ordinarily but cell reading from the buffer
111
is suspended during the system switching time U(s).
In the system switching operation, the system control section
105
operates as follows. The system control section
105
confirms that no cell remains in the former operating system cell storage section
104
(present standby system cell storage section
104
). If one or more cells remained in the former operating system cell storage section
104
, the system control section
105
continues monitoring the former operating system cell storage section
104
until it confirms that all the cells have been outputted and no cell remains. If we assume it takes a confirmation time S(s) for the confirmation of the vacancy of the former operating system cell storage section
104
since the start of the system switching, the cell reading from the present operating system cell storage section
104
keeps on being suspended during the confirmation time S(s). After the vacancy of the former operating system cell storage section
104
could be confirmed, the system control section
105
further suspends the cell reading from the present operating system cell storage section
1
Chin Wellington
NEC Corporation
Pham Brenda
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