Television – Format conversion – Changing number of lines for standard conversion
Reexamination Certificate
1997-07-01
2002-04-30
Kostak, Victor R. (Department: 2711)
Television
Format conversion
Changing number of lines for standard conversion
C348S452000, C348S445000
Reexamination Certificate
active
06380979
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a scanning line converting circuit having the function of converting the number of scanning lines for a video signal inputted thereto and outputting another video signal having a different number of scanning lines.
Since the arrival of the multimedia age, systems for image media have greatly been diversified. In the field of television broadcasting, newly developed image display systems of EDTV (Extended Definition TeleVision) and HDTV (High Definition TeleVision) have been used in addition to the conventional NTSC system. European countries have their own image display systems of PAL and SECAM. In the field of computer graphics, there are image display systems peculiar to individual computer producers besides VGA, SVGA, and XGA, which are well known. However, it is substantially impossible for the viewer to prepare a versatile image receiving terminal compatible with all the image display systems. As a result, technology which allows images in different systems to be shown on a single display has been valued increasingly in recent years.
In the field of display devices, the advancement of flat panel displays including a PDP (Plasma Display Panel) and a LCD (Liquid Crystal Display) is remarkable. Unlike a CRT, a flat panel display is a dot matrix-display having a specified dot size. In accordance with their, applications, there are various flat panel displays of different dot sizes compatible with VGA, SVGA, and like systems. Hence, it is also important to provide technology which allows a single image source to be shown on different-sized displays possessed by the viewers.
From the foregoing, it can be concluded that a scanning line converting circuit having multisource/multipanel compatibility to allow various image sources to be shown on various display panels plays a significant role in the multimedia age. Accordingly, the demand grows for a low-cost scanning line converting circuit capable of converting the number of scanning lines at an arbitrary conversion ratio.
FIG. 31
is a block diagram showing the structure of a scanning line converting circuit according to a first conventional embodiment. Original video signals inputted to an input terminal IN are converted to digital video signals by an A/D converter
101
, which are stored in a field memory
102
on a field basis. A time base converting circuit
103
receives the video signals from the field memory
102
on a scanning-line basis and overreads, several times, the received scanning lines on the output side by using a post-conversion sampling clock. The overread scanning lines are smoothed by a conversion filter
104
to form vertically smooth video signals, which are converted by a D/A converter
105
to analog video signals and outputted from an output terminal OUT (see Japanese laid-Open Patent Publication HEI 6-62267).
As a second conventional embodiment, there has been proposed a scanning line converting circuit for converting the number of scanning lines at a specified conversion ratio by using only a line memory (see Japanese Laid-Open Patent Publication HEI 5-103305).
In terms of the foregoing multisource/multipanel compatibility, however, the scanning line converting circuit according to the first conventional embodiment has the drawbacks of high cost and large circuit size because of a large-capacity memory, such as a field memory, used therein.
As for the scanning line converting circuit according to the second conventional embodiment, it needs different filtering coefficients corresponding to different ratios for converting the scanning lines, so that numerous filtering coefficients should be prepared if conversion is to be made at an arbitrary conversion ratio, which is practically impossible. In the case where only conversion ratios of integral multiples such as 3:1 and 1:2 are prepared, if conversion is to be made at an arbitrary conversion ratio, interference between a write address and a read address in the line memory, i.e., the outstripping of a write operation by a read operation or the outstripping of a read operation by a write operation prevents proper conversion of the number of scanning lines.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a low-cost scanning line converting circuit being capable of properly converting the number of scanning lines for a video signal at various conversion ratios. Another object of the present invention is to provide a scanning line converting circuit being capable of converting a system for scanning a video signal and changing the setting of an aspect ratio.
Specifically, the present invention provides a scanning line converting circuit for converting the number of scanning lines for a video signal, comprising: scanning-line selective outputting means for selecting, from scanning line signals composing an original video signal, at least one necessary to generate a post-conversion scanning line signal and outputting the selected scanning line signal; and scanning line interpolating means having interpolation coefficient generating means for generating an interpolation coefficient based on a predetermined scanning line conversion ratio, the scanning line interpolating means multiplying the scanning line signal selectively outputted from the scanning-line selective outputting means by the interpolation coefficient generated from the interpolation coefficient generating means and adding up the results of multiplication to generate the post-conversion scanning line signal, the interpolation coefficient generating means being so constituted as to generate the interpolation coefficient based on at least two scanning line conversion ratios.
According to the present invention, the scanning-line interpolating means multiplies, by the interpolation coefficient, the scanning line signal selectively outputted from the scanning-line selective outputting means and adds up the results of multiplications to generate a post-conversion scanning line signal. The interpolation coefficient as the multiplier factor is generated from the interpolation-coefficient generating means. Since the interpolation-coefficient generating means is so constituted as to generate the interpolation coefficient based on at least two ratios for converting the scanning lines, the number of scanning lines can be converted without increasing or changing circuits at a conversion ratio for which the interpolation coefficient generating means can generate the interpolation coefficient. As a result, the number of scanning lines can be converted properly at various conversion ratios.
Preferably, the interpolation coefficient generating means generates, when the predetermined scanning line conversion ratio is x:y, (1−K/y) and (K/y) as respective interpolation coefficients for the chronologically anterior one and the chronologically posterior one of two scanning line signals necessary to generate the post-conversion scanning line signal (where K=(LN×x)%y is satisfied, LN is a number assigned to the post-conversion scanning line signal, and % is remainder calculation).
The present invention also provides a scanning line converting circuit for converting the number of signal lines for a video signal, comprising: scanning-line selective outputting means having a plurality of line memories for storing an original video signal on a scanning-line basis, the scanning-line selective outputting means selecting, from scanning line signals stored in the plurality of line memories, at least one necessary to generate a post-conversion scanning line signal and outputting the selected scanning line signal; and scanning line interpolating means for multiplying the scanning line signal selectively outputted from the scanning-line selective outputting means by an interpolation coefficient and adding up the results of multiplication to generate the post-conversion scanning line signal, the scanning-line selective outputting means being constituted such that respective speeds and timings for signal inputting a
Kawahara Isao
Tagami Tomohisa
Tokoi Masaki
Kostak Victor R.
Matsushita Electric - Industrial Co., Ltd.
McDermott & Will & Emery
LandOfFree
Scanning line converting circuit and interpolation... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Scanning line converting circuit and interpolation..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Scanning line converting circuit and interpolation... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2930086